Rainbow-electronics ATR0600 Bedienungsanleitung

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Rev. 4536F–GPS–10/03
Features
Very Low Power Design ( 50 mW)
Single IF Concept
2-bit ADC on Chip
Small QFN Package (28 Pins)
Highly Integrated, Few External Components
UHF6 Technology
Electrostatic sensitive device.
Observe precautions for handling.
Description
With the growing importance of mobile communication, location awareness is a key
feature for more and more products and services. Due to its small size and minimal
power consumption, the GPS front-end IC ATR0600 is an ideal solution for mobile
applications and navigation systems.
Figure 1. Block Diagram
RFIN
LNA
SAW
Ant
PFD XTO
LC-BP
RFNIN
96.76 MHz
1575.42 MHz
Dig. IF at 4.35 MHz
VCO
1478.6
VS3
VDIG
Power
control
REF
NBPI
VGA amp
BP-Filter
OR
64
1
1
4
GC
AGCO
SC
23.104 MHz
SIGL
SIGH
P1
VS1
VS2
VS5
23.104 MHz
P2
MHz
BPI
BP
NBP
XTO
NXTO
VS7
X
NX
GPS
Front-end IC
ATR0600
Preliminary
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Inhaltsverzeichnis

Seite 1 - Preliminary

Rev. 4536F–GPS–10/03Features• Very Low Power Design (≈ 50 mW)• Single IF Concept• 2-bit ADC on Chip• Small QFN Package (28 Pins)• Highly Integrated, F

Seite 2

10ATR0600 [Preliminary] 4536F–GPS–10/03Package InformationOrdering InformationExtended Type Number Package RemarksATR0600-PJQ QFN28 - 5x5 Taped and

Seite 3

Printed on recycled paper.Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Co

Seite 4

2ATR0600 [Preliminary] 4536F–GPS–10/03Pin ConfigurationFigure 2. Pinning QFN28 BPNBPBPINBPIVS1n.c.n.c.XVS5XTONXTOVS7NXAGCOn.c.RFNINRFINVS3P1P2n.c.G

Seite 5

3ATR0600 [Preliminary]4536F–GPS–10/03Functional DescriptionThe specification of GPS receivers for personal mobile applications strongly differs from

Seite 6

4ATR0600 [Preliminary] 4536F–GPS–10/03.Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam

Seite 7

5ATR0600 [Preliminary]4536F–GPS–10/032 Mixer and 1st IF-filter2.1 Output frequency fref = 23.104 MHz 15, 16 fIF96.76 MHz B2.2 Input impedance fref =

Seite 8

6ATR0600 [Preliminary] 4536F–GPS–10/03Interface Description Figure 3. Clock Interface Figure 4. SIGH Interface Figure 5. SIGL Interface Figure 6.

Seite 9

7ATR0600 [Preliminary]4536F–GPS–10/03Figure 8. Power Control Interface P2 Figure 9. Automatic Gain-control Interface Figure 10. A/D Reference Lev

Seite 10 - ATR0600 [Preliminary]

8ATR0600 [Preliminary] 4536F–GPS–10/03Figure 11. Mixer Input Interface Figure 12. XTO Interface VCC250uA2.5k2.5k2mARFNRFChipApplication (Matching)

Seite 11 - Regional Headquarters

9ATR0600 [Preliminary]4536F–GPS–10/03Figure 13. IF-filter Interface Figure 14. Mixer Input Impedance at RF-NRF Imax2mA2pBPImax2mA2pNBP60uAVCC2pBPI

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