Rainbow-electronics ADC12038 Bedienungsanleitung

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TL/H/11354
ADC12H030/ADC12H032/ADC12H034/ADC12H038,
ADC12030/ADC12032/ADC12034/ADC12038
Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
January 1995
ADC12H030/ADC12H032/ADC12H034/ADC12H038,
ADC12030/ADC12032/ADC12034/ADC12038
Self-Calibrating 12-Bit Plus Sign Serial I/O
A/D Converters with MUX and Sample/Hold
General Description
The ADC12030, and ADC12H030 families are 12-bit plus
sign successive approximation A/D converters with serial
I/O and configurable input multiplexers. The ADC12032/
ADC12H032, ADC12034/ADC12H034 and ADC12038/
ADC12H038 have 2, 4 and 8 channel multiplexers, respec-
tively. The differential multiplexer outputs and A/D inputs
are available on the MUXOUT1, MUXOUT2, A/DIN1 and
A/DIN2 pins. The ADC12030/ADC12H030 has a two chan-
nel multiplexer with the multiplexer outputs and A/D inputs
internally connected. The ADC12030 family is tested with a
5 MHz clock, while the ADC12H030 family is tested with an
8 MHz clock. On request, these A/Ds go through a self
calibration process that adjusts linearity, zero and full-scale
errors to less than
g
1 LSB each.
The analog inputs can be configured to operate in various
combinations of single-ended, differential, or pseudo-differ-
ential modes. A fully differential unipolar analog input range
(0V to
a
5V) can be accommodated with a single
a
5V sup-
ply. In the differential modes, valid outputs are obtained
even when the negative inputs are greater than the positive
because of the 12-bit plus sign output data format.
The serial I/O is configured to comply with the NSC
MICROWIRE
TM
. For complementary voltage references see
the LM4040, LM4041 or LM9140.
Applications
Y
Medical instruments
Y
Process control systems
Y
Test equipment
Features
Y
Serial I/O (MICROWIRE Compatible)
Y
2, 4, or 8 channel differential or single-ended
multiplexer
Y
Analog input sample/hold function
Y
Power down mode
Y
Variable resolution and conversion rate
Y
Programmable acquisition time
Y
Variable digital output word length and format
Y
No zero or full scale adjustment required
Y
Fully tested and guaranteed with a 4.096V reference
Y
0V to 5V analog input range with single 5V power
supply
Y
No Missing Codes over temperature
Key Specifications
Y
Resolution 12-bit plus sign
Y
12-bit plus sign conversion time
Ð ADC12H030 family 5.5 ms (max)
Ð ADC12030 family 8.8 ms (max)
Y
12-bit plus sign throughput time
Ð ADC12H030 family 8.6 ms (max)
Ð ADC12030 family 14 ms (max)
Y
Integral linearity error
g
1 LSB (max)
Y
Single supply 5V
g
10%
Y
Power dissipation 33 mW (max)
Ð Power down 100 mW (typ)
ADC12038 Simplified Block Diagram
TL/H/11354 1
TRI-STATE
É
is a registered trademark of National Semiconductor Corporation.
COPS
TM
microcontrollers, HPC
TM
and MICROWIRE
TM
are trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
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Inhaltsverzeichnis

Seite 1 - Key Specifications

TL/H/11354ADC12H030/ADC12H032/ADC12H034/ADC12H038,ADC12030/ADC12032/ADC12034/ADC12038Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with

Seite 2 - Ordering Information

Electrical Characteristics (Continued)TL/H/11354– 10FIGURE 1a. Transfer CharacteristicTL/H/11354– 11FIGURE 1b. Simplified Error Curve vs Output Code w

Seite 3

Electrical Characteristics (Continued)TL/H/11354– 12FIGURE 1c. Simplified Error Curve vs Output Code after Auto-Calibration CycleTL/H/11354– 13FIGURE

Seite 4 - Error 8-bit

Typical Performance CharacteristicsThe following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified. The performance

Seite 5 - Electrical Characteristics

Typical Performance Characteristics (Continued)The following curves apply for 12-bitasign mode after auto-calibration unless otherwise specified. The

Seite 6

Typical Dynamic Performance Characteristics (Continued)The following curves apply for 12-bitasign mode after auto-calibration unless otherwise specifi

Seite 7 - AC Electrical Characteristics

Test CircuitsDO ‘‘TRI-STATE’’ (t1H,t0H)TL/H/11354– 3DO except ‘‘TRI-STATE’’TL/H/11354– 4Leakage CurrentTL/H/11354– 5Timing DiagramsDO Falling and Risi

Seite 8

Timing Diagrams (Continued)DO Data Output Timing Using CSTL/H/11354– 21DO Data Output Timing with CS Continuously LowTL/H/11354– 22ADC12038 Auto Cal o

Seite 9 - Figure 2

Timing Diagrams (Continued)ADC12038 Read Data without Starting a Conversion Using CSTL/H/11354– 24ADC12038 Read Data without Starting a Conversion wit

Seite 10 - (Continued)

Timing Diagrams (Continued)ADC12038 Conversion Using CSwith 8-Bit Digital Output FormatTL/H/11354– 26ADC12038 Conversion Using CS with 16-Bit Digital

Seite 11

Timing Diagrams (Continued)ADC12038 Conversion with CSContinuously Low and 8-Bit Digital Output FormatTL/H/11354– 28ADC12038 Conversion with CS Contin

Seite 12 - TL/H/11354– 14

Connection Diagrams16-Pin Dual-In-Line andWide Body SO PackagesTL/H/11354– 6Top View20-Pin Dual-In-Line andWide Body SO PackagesTL/H/11354– 7Top View2

Seite 13 - TL/H/11354– 16

Timing Diagrams (Continued)ADC12038 Software Power Up/Down Using CSwith 16-Bit Digital Output FormatTL/H/11354– 52ADC12038 Software Power Up/Down with

Seite 14 - TL/H/11354– 17

Timing Diagrams (Continued)ADC12038 Hardware Power Up/DownTL/H/11354– 32Note: Hardware power up/down may occur at any time. If PD is high while a conv

Seite 15 - Timing Diagrams

Pin DescriptionsCCLK The clock applied to this input controls the su-cessive approximation conversion time intervaland the acquisition time. The rise

Seite 16 - Timing Diagrams (Continued)

Pin Descriptions (Continued)VREFaThis is the positive analog voltage reference in-put. In order to maintain accuracy, the voltagerange of VREF(VREFeVR

Seite 17

TablesTABLE I. Data Out FormatsDO Formats DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 DB16Signwith17X X X X Sign MSB 10 9 8

Seite 18

Tables (Continued)TABLE III. ADC12034 Multiplexer AddressingAnalog Channel AddressedA/D InputMultiplexerModeMUX and AssignmentPolarityOutputAddress wi

Seite 19

Tables (Continued)TABLE V. Mode ProgrammingADC12038 DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7Mode Selected(Current)(next ConversionDO FormatCycle)ADC12034 DI0 D

Seite 20

Tables (Continued)TABLE VII. Status RegisterStatus BitDB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8LocationStatus Bit PU PD Cal 8 or 9 12 or 13 16 or 17 Sign Ju

Seite 21

Application Hints (Continued)it will expect to see 13 SCLK pulses for each I/O transmis-sion. The number of SCLK pulses that the ADC expects tosee is

Seite 22 - Figure 3

Application Hints (Continued)1.6 User Mode and Test ModeAn instruction may be issued to the ADC to put it into testmode. Test mode is used by the manu

Seite 23 - Figure 4

Absolute Maximum Ratings (Notes1&2)If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Dist

Seite 24 - High or Low state

Application Hints (Continued)With the single-ended multiplexer configuration CH0through CH7 can be assigned to the MUXOUT1 pin. TheCOM pin is always a

Seite 25 - Tables (Continued)

Application Hints (Continued)For pseudo-differential signed operation, the biasing circuitshown inFigure 10shows a signal AC coupled to the ADC.This g

Seite 26

Application Hints (Continued)TL/H/11354– 49FIGURE 12. Pseudo-Differential Biasing without the Loss of Digital Output RangeTL/H/11354– 50FIGURE 13. Ful

Seite 27 - Application Hints

Application Hints (Continued)3.0 REFERENCE VOLTAGEThe difference in the voltages applied to the VREFaandVREFbdefines the analog input span (the differ

Seite 28 - Figure 6

Application Hints (Continued)6.0 INPUT SOURCE RESISTANCEFor low impedance voltage sources (k600X), the inputcharging current will decay, before the en

Seite 29 - Figure 7

Application Hints (Continued)11.0 CLOCK SIGNAL LINE ISOLATIONThe ADC12030/2/4/8’s performance is optimized by rout-ing the analog input/output and ref

Seite 30 - Figure 9

Application Hints (Continued)TL/H/11354– 44Note: VAa,VDa, and VREFaon the ADC12038 each have 0.01 mF and 0.1 mF chip caps, and 10 mF tantalum caps. Al

Seite 31 - Figure 13

Application Hints (Continued)’variables DOL4Data Out word length, DI4Data string for A/D DI input,’DO4A/D result string’SET CS# HIGHOUT &H3FC, (&a

Seite 32 - Application Hints (Continued)

Physical Dimensions inches (millimeters)Order Number ADC12030CIWM or ADC12H030CIWMNS Package Number M16BOrder Number ADC12032CIWM or ADC12H032CIWMNS P

Seite 33 - Figure 15

Physical Dimensions inches (millimeters) (Continued)Order Number ADC12034CIWM or ADC12H034CIWMNS Package Number M24BOrder Number ADC12038CIWM or ADC12

Seite 34

Converter Electrical Characteristics (Continued)The following specifications apply for VaeVAaeVDaea5.0 VDC,VREFaea4.096 VDC,VREFbe0VDC, 12-bitasign co

Seite 35

Physical Dimensions inches (millimeters) (Continued)Order Number ADC12030CIN or ADC12H030CINNS Package Number N16EOrder Number ADC12032CIN or ADC12H03

Seite 36

Physical Dimensions inches (millimeters) (Continued)Order Number ADC12034CIN or ADC12H034CINNS Package Number N24C41

Seite 37

ADC12H030/ADC12H032/ADC12H034/ADC12H038,ADC12030/ADC12032/ADC12034/ADC12038Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sa

Seite 38

Electrical CharacteristicsThe following specifications apply for VaeVAaeVDaea5.0 VDC,VREFaea4.096 VDC,VREFbe0VDC, 12-bitasign conversion mode, fCKefSK

Seite 39

DC and Logic Electrical CharacteristicsThe following specifications apply for VaeVAaeVDaea5.0 VDC,VREFaea4.096 VDC,VREFbe0VDC, 12-bitasign conversion

Seite 40

AC Electrical CharacteristicsThe following specifications apply for VaeVAaeVDaea5.0 VDC,VREFaea4.096 VDC,VREFbe0VDC, 12-bitasign conversion mode, tret

Seite 41 - NS Package Number N24C

AC Electrical Characteristics (Continued)The following specifications apply for VaeVAaeVDaea5.0 VDC,VREFaea4.096 VDC,VREFbe0VDC, 12-bitasign conversio

Seite 42

Electrical Characteristics (Continued)Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings

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