Rainbow-electronics ATR0630P1 Bedienungsanleitung

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NOTE: This is a summary document.
The complete document is available.
For more information, please contact
your local Atmel sales office.
Features
16-channel GPS Correlator
8192 Search Bins with GPS Acquisition Accelerator
Accuracy: 2.5m CEP (2D, Stand Alone)
Time to First Fix: 34s (Cold Start)
Acquisition Sensitivity: –140 dBm (With External LNA)
Tracking Sensitivity: –150 dBm (With External LNA)
Utilizes the ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
High-performance 32-bit RISC Architecture
EmbeddedICE
(In-Circuit Emulation)
128 Kbytes Internal RAM
384 Kbytes Internal ROM with u-blox GPS Firmware
1.5-bit ADC On-chip
Single IF Architecture
2 External Interrupts
24 User-programmable I/O Lines
1 USB Device Port
Universal Serial Bus (USB) 2.0 Full-speed Device
Embedded USB V2.0 Full-speed Transceiver
2 USARTs
Master/Slave SPI Interface
4 External Slave Chip Selects
Programmable Watchdog Timer
Advanced Power Management Controller (APMC)
Geared Master Clock to Reduce Power Consumption
Sleep State with Disabled Master Clock
Hibernate State with 32.768 kHz Master Clock
Real Time Clock (RTC)
1.8V to 3.3V User-definable IO Voltage for Several GPIOs with 5V Tolerance
4 KBytes of Battery Backup Memory
7 mm × 10 mm 96 Pin BGA Package, 0.8 mm Pitch, Pb-free, RoHS-compliant
Benefits
Fully Integrated Design With Low BOM
No External Flash Memory Required
Requires Only a GPS XTAL, No TCXO
Supports NMEA
®
, UBX Binary and RTCM Protocol for DGPS
Supports SBAS (WAAS, EGNOS, MSAS)
Up to 4Hz Update Rate
Supports A-GPS (Aiding)
Excellent Noise Performance
ANTARIS4
Single-chip GPS
Receiver
ATR0630P1
Automotive
Summary
4978AS–GPS–12/07
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Inhaltsverzeichnis

Seite 1 - Benefits

NOTE: This is a summary document. The complete document is available. For more information, please contact your local Atmel sales office. Features• 16

Seite 2

104978AS–GPS–12/07ATR0630P1Boot SectionC6 BOOT_MODE DIGITAL IN - Leave open, internal pull downReset A7 NRESET DIGITAL IN Low Reset input; open dra

Seite 3

114978AS–GPS–12/07ATR0630P1Active Antenna SupervisionC8 NANTSHORT DIGITAL IN Low Active antenna short detection InputG5, G6 NAADET0/NAADET1DIGITAL IN

Seite 4

124978AS–GPS–12/07ATR0630P13.3 External Connections for a Working GPS SystemFigure 3-2. Example of an External Connection (ATR0630P1) ATR0630P1see Tab

Seite 5

134978AS–GPS–12/07ATR0630P15. Package Information 4. Ordering InformationExtended Type Number Package MPQ RemarksATR0630P1-7KQY BGA96 30007mm× 10 mm,

Seite 6

4978AS–GPS–12/07Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel Asia

Seite 7

24978AS–GPS–12/07ATR0630P11. DescriptionThe ATR0630P1 is a low-power, single-chip GPS receiver, especially designed to meet therequirements of mobile

Seite 8

34978AS–GPS–12/07ATR0630P12. Architectural Overview2.1 Block DiagramFigure 2-1. ATR0630P1 Block Diagram NSLEEPNSHDNXT_INTMSTCKTDOTDINTRSTDBG_ENP25/NAA

Seite 9

44978AS–GPS–12/07ATR0630P12.2 General DescriptionThe ATR0630P1 has been designed especially for mobile applications. It provides high isolationbetween

Seite 10 - ATR0630P1

54978AS–GPS–12/07ATR0630P12.7 VGA/AGCThe on-chip automatic gain control (AGC) stage sets the gain of the VGA in order to optimallyload the input of th

Seite 11

64978AS–GPS–12/07ATR0630P13. Pin Configuration3.1 PinoutFigure 3-1. Pinning BGA96 (Top View) Table 3-1. ATR0630P1 Pinout Pin Name BGA 96 Pin TypePull

Seite 12

74978AS–GPS–12/07ATR0630P1GNDA B4 SupplyGNDA D2 SupplyGNDA E1 SupplyGNDA E2 SupplyGNDA E3 SupplyGNDA F1 SupplyGNDA F2 SupplyGNDA F3 SupplyGNDA G1 Supp

Seite 13

84978AS–GPS–12/07ATR0630P1P20 G7 Digital I/O Configurable (PD) TIMEPULSE SCK2 SCK2P21 E6 Digital I/O Configurable (PU) TXD2 TXD2P22 D10 Digital I/O PU

Seite 14 - Product Contact

94978AS–GPS–12/07ATR0630P13.2 Signal DescriptionVDD_USB(3)A10 SupplyVDD18 H9 SupplyVDD18 G11 SupplyVDD18 F12 SupplyVDD18 B9 SupplyVDD18 E5 SupplyVDDIO

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