4-1Features• Compatible with MCS-51™ Products• 20K Bytes of Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• Fully Static Operation:
AT89LV5510Baud Rate GeneratorTimer 2 is selected as the baud rate generator by settingTCLK and/or RCLK in T2CON (Table 2). Note that the baudrates for
AT89LV5511Programmable Clock OutA 50% duty cycle clock can be programmed to come out onP1.0, as shown in Figure 5. This pin, besides being a regu-lar
AT89LV5512Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier that can be configured for use as
AT89LV5513Power Down ModeIn the power down mode, the oscillator is stopped, and theinstruction that invokes power down is the last instructionexecuted
AT89LV5514Figure 9. Programming the Flash MemoryChip Erase: The entire Flash array is erased electricallyby using the proper combination of control
AT89LV5515Flash Programming ModesNote: 1. Chip Erase requires a 10 ms PROG pulse.Mode RST PSENALE/PROG EA/VPPP2.6 P2.7 P3.6 P3.7Write Code Data H L 12
AT89LV5516Flash Programming and Verification CharacteristicsTA = 0°C to 70°C, VCC = 5.0V ± 10%Flash Programming and Verification Waveforms (VPP = 12V)
AT89LV5517Absolute Maximum Ratings*DC CharacteristicsThe values shown in this table are valid for TA = -40°C to 85°C and VCC = 2.7V to 6.0V, unless ot
AT89LV5518AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other outp
AT89LV5519External Program Memory Read CycleExternal Data Memory Read Cycle
AT89LV552Block DiagramPORT 2 DRIVERSPORT 2LATCHP2.0 - P2.7FLASHPORT 0LATCHRAMPROGRAMADDRESSREGISTERBUFFERPCINCREMENTERPROGRAMCOUNTERDPTRRAM ADDR.REGIS
AT89LV5520External Data Memory Write CycleExternal Clock Drive WaveformsExternal Clock DriveSymbol Parameter Min Max Units1/tCLCLOscillator Frequency
AT89LV5521Serial Port Timing: Shift Register Mode Test ConditionsThe values in this table are valid for VCC = 5.0V ± 20% and Load Capacitance = 80 pF.
AT89LV5522Notes: 1. XTAL1 tied to GND for ICC (power down)2. Lock bits programmed
AT89LV5523Ordering InformationSpeed(MHz)PowerSupply Ordering Code Package Operation Range12 2.7V - 6.0V AT89LV55-12ACAT89LV55-12JCAT89LV55-12PC44A44J4
© Atmel Corporation 2001.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa
AT89LV553The AT89LV55 provides the following standard features:20K bytes of Flash, 256 bytes of RAM, 32 I/O lines, three16-bit timer/counters, a six-v
AT89LV554ALE/PROGAddress Latch Enable is an output pulse for latching thelow byte of the address during accesses to external mem-ory. This pin is also
AT89LV555Table 1. AT89LV55 SFR Map and Reset Values0F8H 0FFH0F0HB000000000F7H0E8H 0EFH0E0HACC000000000E7H0D8H 0DFH0D0HPSW000000000D7H0C8HT2CON0000000
AT89LV556Table 2. T2CON – Timer/Counter 2 Control RegisterTimer 0 and 1Timer 0 and 1 in the AT89LV55 operate the same way asTimer 0 and Timer 1 in th
AT89LV557Capture ModeIn the capture mode, two options are selected by bitEXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timeror counter which upon
AT89LV558Figure 2. Timer 2 Auto Reload Mode (DCEN = 0)Table 4. T2MOD—Timer 2 Mode Control RegisterT2MOD Address = 0C9H Reset Value = XXXX XX00BNot B
AT89LV559Figure 3. Timer 2 Auto Reload Mode (DCEN = 1)Figure 4. Timer 2 in Baud Rate Generator ModeOSCEXF2TF2T2EX PINCOUNTDIRECTION1=UP0=DOWNT2 PI
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