Rainbow-electronics AT25256 Bedienungsanleitung

18-lead SOIC12348765CSSOWPGNDVCCHOLDSCKSIFeatures• Serial Peripheral Interface (SPI) Compatible• Supports SPI Modes 0 (0,0) and 3 (1,1)• Medium-voltag

10AT25128/2563262C–SEEPR–6/03Timing Diagrams (for SPI Mode 0 (0, 0))Synchronous Data TimingWREN TimingWRDI TimingSOVOHVOLHI-ZHI-ZtVVALID INSIVIHVILtHt

11AT25128/2563262C–SEEPR–6/03RDSR TimingWRSR TimingREAD TimingCSSCK01234567891011121314SIINSTRUCTIONSO76543210DATA OUTMSBHIGH IMPEDANCE15

12AT25128/2563262C–SEEPR–6/03WRITE TimingHOLD Timing SOSCKHOLDtCDtHDtHZtLZtCDtHDCS

13AT25128/2563262C–SEEPR–6/03 AT25128 Ordering Information Ordering Code Package Operation RangeAT25128-10PA-5.0CAT25128N-10SA-5.0C8P38S1Automotive(-4

14AT25128/2563262C–SEEPR–6/03 AT25256 Ordering InformationOrdering Code Package Operation RangeAT25256-10PA-5.0CAT25256W-10SA-5.0C8P38S2Automotive(-40

15AT25128/2563262C–SEEPR–6/03Packaging Information8P3 – PDIP 2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8P3, 8-lead, 0.300" W

16AT25128/2563262C–SEEPR–6/038S1 – JEDEC SOIC 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. Note:10/10/018S1, 8-lead (0.150"

17AT25128/2563262C–SEEPR–6/038S2 – EIAJ SOIC 2325 Orchard ParkwaySan Jose, CA 95131TITLEDRAWING NO.RREV. 8S2, 8-lead, 0.209" Body, Plastic Sma

Printed on recycled paper.3262C–SEEPR–6/03 xMDisclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly

2AT25128/2563262C–SEEPR–6/03The AT25128/256 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial DataI

3AT25128/2563262C–SEEPR–6/03Note: 1. This parameter is characterized and is not 100% tested.Note: 1. VIL and VIH max are reference only and are not te

4AT25128/2563262C–SEEPR–6/03Note: 1. This parameter is characterized and is not 100% tested. Contact Atmel for further information.AC CharacteristicsA

5AT25128/2563262C–SEEPR–6/03Serial Interface DescriptionMASTER: The device that generates the serial clock.SLAVE: Because the Serial Clock pin (SCK) i

6AT25128/2563262C–SEEPR–6/03SPI Serial Interface Functional DescriptionThe AT25128/256 is designed to interface directly with the synchronous serial

7AT25128/2563262C–SEEPR–6/03WRITE ENABLE (WREN): The device will power-up in the write disable state when VCCis applied. All programming instructions

8AT25128/2563262C–SEEPR–6/03The WRSR instruction also allows the user to enable or disable the write protect (WP)pin through the use of the Write Prot

9AT25128/2563262C–SEEPR–6/03The AT25128/256 is capable of a 64-byte PAGE WRITE operation. After each byte ofdata is received, the six low order addres