Rainbow-electronics DS1286 Bedienungsanleitung PDF herunterladen (Seite 2)

DS1286

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adjusted for months with less than 31 days, including correction for leap year. The Watchdog Timekeeper

operates in either 24-hour or 12-hour format with an AM/PM indicator. The watchdog timer provides

alarm windows and interval timing between 0.01 seconds and 99.99 seconds. The real time alarm

provides for preset times of up to one week.

OPERATION - READ REGISTERS

The DS1286 executes a read cycle whenever WE (Write Enable) is inactive (High) and CE (Chip

Enable) and OE (Output Enable) are active (Low). The unique address specified by the six address inputs

(A0-A5) defines which of the 64 registers is to be accessed. Valid data will be available to the eight data

output drivers within t

ACC

(Access Time) after the last address input signal is stable, providing that CE

and OE access times are also satisfied. If OE and CE access times are not satisfied, then data access must

be measured from the latter occurring signal ( CE or OE ) and the limiting parameter is either t

for CE

or t

for OE rather than address access.

OPERATION - WRITE REGISTERS

The DS1286 is in the write mode whenever the WE (Write Enable) and CE (Chip Enable) signals are in

the active (Low) state after the address inputs are stable. The latter occurring falling edge of CE or WE

will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of CE

or WE . All address inputs must be kept valid throughout the write cycle. WE must return to the high state

for a minimum recovery state (t

) before another cycle can be initiated. Data must be valid on the data

bus with sufficient Data Set Up (t

) and Data Hold Time (t

) with respect to the earlier rising edge of

CE or WE . The OE control signal should be kept inactive (High) during write cycles to avoid bus

contention. However, if the output bus has been enabled (CE and OE active), then WE will disable the

outputs in t

ODW

from its falling edge.

DATA RETENTION

The Watchdog Timekeeper provides full functional capability when V

is greater than 4.5 volts and

write protects the register contents at 4.25 volts typical. Data is maintained in the absence of V

without

any additional support circuitry. The DS1286 constantly monitors V

. Should the supply voltage decay,

the Watchdog Timekeeper will automatically write protect itself and all inputs to the registers become

“Don’t Care.” Both INTA and INTB (INTB) are open drain outputs. The two interrupts and the internal

clock continue to run regardless of the level of V

. However, it is important to insure that the pull-up

resistors used with the interrupt pins are never pulled up to a value which is greater than V

+ 0.3V. As

falls below approximately 3.0 volts, a power switching circuit turns on the lithium energy source to

maintain the clock, and timer data functionality. It is also required to insure that during this time (battery

backup mode), the voltage present at

INTA and INTB (INTB) never exceeds 3.0V. At all times the

current on each should not exceed +2.1 mA or -1.0 mA. However, if the active high mode is selected for

INTB (INTB), this pin will only go high in the presence of V

. During power-up, when V

rises above

approximately 3.0 volts, the power switching circuit connects external V

and disconnects the internal

lithium energy source. Normal operation can resume after V

exceeds 4.5 volts for a period of 150 ms.

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