Rainbow-electronics DS1340 Bedienungsanleitung PDF herunterladen (Seite 7)

temperature shifts. External circuit noise coupled into

the oscillator circuit can result in the clock running fast.

Figure 4 shows a typical PC board layout for isolating

the crystal and oscillator from noise. Refer to

Application Note 58: Crystal Considerations with Dallas

Real-Time Clocks (www.maxim-ic.com/RTCapps) for

detailed information.

Operation

The DS1340 operates as a slave device on the serial

bus. Access is obtained by implementing a START

condition and providing a device identification code fol-

lowed by data. Subsequent registers can be accessed

sequentially until a STOP condition is executed. The

device is fully accessible and data can be written and

read when V

is greater than V

. However, when

falls below V

, the internal clock registers are

blocked from any access. If V

is less than V

BACKUP

the device power is switched from V

to V

BACKUP

when V

drops below V

. If V

is greater than

BACKUP

, the device power is switched from V

BACKUP

when V

drops below V

BACKUP

. The regis-

ters are maintained from the V

BACKUP

source until V

is returned to nominal levels. The functional diagram

(Figure 5) shows the main elements of the serial RTC.

Address Map

Table 2 shows the DS1340 address map. The RTC reg-

isters are located in address locations 00h to 06h, and

DS1340

2-Wire RTC with Trickle Charger

_____________________________________________________________________ 7

CRYSTAL

GND

LOCAL GROUND PLANE (LAYER 2)

Figure 4. Layout Example

SERIAL BUS

INTERFACE

AND ADDRESS

OSCILLATOR

CONTROL

LOGIC

SCL

SDA

512Hz

MUX/BUFFER

FT/OUT

USER BUFFER

(7 BYTES)

CLOCK AND

CALENDAR

REGISTERS

32,768Hz

1Hz

POWER

CONTROL

BACKUP

DIVIDER AND

CALIBRATION

CIRCUIT

DS1340

Figure 5. Functional Diagram

ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2 BIT 1

BIT 0

FUNCTION

RANGE

00H

EOSC

10 Seconds Seconds Seconds 00–59

01H X 10 Minutes Minutes Minutes 00–59

02H CEB CB 10 Hours Hours

Century/

Hours

0–1; 00–23

03H X X X X X Day Day 01–07

04H X X 10 Date Date Date 01–31

05H X X X

10 Month

Month Month 01–12

06H 10 Year Year Year 00–99

07H OUT FT S CAL4

CAL3

CAL2 CAL1

CAL0

Control —

08H

TCS3 TCS2 TCS1

TCS0

DS1

DS0

ROUT1 ROUT0

Trickle

Charger

—

09H OSF 0 0 0 0 0 0 0 Flag —

Table 2. Address Map

X = Read/Write bit

Note: Unless otherwise specified, the state of the registers is not defined when power is first applied.

1 2 3 4 5 6 7 8 9 10 11 12

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