DS1870
LDMOS RF Power-Amplifier Bias
Controller
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A2D Value
0
Temp Value <R><NA><0000h> The signed 2’s complement direct-to-temperature measurement.
Vcc Value <R><NA><0000h> Unsigned V
CC
voltage measurement.
VD Value <R><NA><0000h> Unsigned V
D
voltage measurement.
ID1 Value <R><NA><0000h> Unsigned I
D1
voltage measurement.
A2D Value
1
ID2 Value <R><NA><0000h> Unsigned I
D2
voltage measurement.
Status
Hi Alarm <R><NA><00h> High-Alarm Status bits.
a) Temp Hi High-alarm status for temperature measurement.
b) Vcc Hi High-alarm status for V
CC
measurement.
c) VD Hi High-alarm status for V
D
measurement.
d) ID1 Hi High-alarm status for I
D1
measurement.
e) ID2 HI High-alarm status for I
D2
measurement.
Lo Alarm <R><NA><40h> Low-Alarm Status bits.
a) Temp Lo Low-alarm status for temperature measurement.
b) Vcc Lo Low-alarm status for V
CC
measurement. This bit is set when the V
CC
supply is below
the POR trip-point value. It clears itself when a V
CC
measurement is completed and
the value is above the low threshold.
c) VD Lo Low-alarm status for V
D
measurement.
d) ID1 Lo Low-alarm status for I
D1
measurement.
e) ID2 Lo Low-alarm status for I
D2
measurement.
I/O Status <R><NA><see below> Status of the FAULT pin.
a) Fault Logical value of the FAULT pin. Fault is logic HIGH during power-on.
b) Mint Maskable Interrupt. FAULT is an open-drain output. In case FAULT was pulled low
externally or was missing the external pullup resistor, this bit reflects the logical value
the DS1870 is trying to output on the FAULT pin. If any ‘Hi Alarm’ or ‘Lo Alarm’ is
active and its corresponding ‘Fault Ena’ bit is enabled, or ‘RDBY’ is a 1, then this bit is
active high. Otherwise, this bit is a zero.
c) Rdyb Ready Bar. When the supply is above the power-on-analog (V
POA
) trip point, this bit is
active low. Thus, this bit reads a logic 1 if the supply is below V
POA
or too low to com-
municate over the I
2
C bus.
A2D Status <R/W><V><00h> Status of completed conversions. At power-on, these bits are cleared and are
set as each conversion is completed. These bits can be cleared so that completion
of new conversions may be verified.
a) Temp Rdy Temperature conversion is ready.
b) Vcc Rdy V
CC
conversion is ready.
c) VD Rdy V
D
conversion is ready.
d) ID1 Rdy I
D1
conversion is ready.
e) ID2 Rdy I
D2
conversion is ready.
(20 Seiten)
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