Rainbow-electronics DS2432 Bedienungsanleitung

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1 of 30 040201
FEATURES
1128 bits of 5V EEPROM memory parti-
tioned into four pages of 256 bits, a 64-bit
write-only secret and up to 5 general purpose
read/write registers
On-chip 512-bit SHA-1 engine to compute
160-bit Message Authentication Codes
(MAC) and to generate secrets
Write access requires knowledge of the secret
and the capability of computing and transmit-
ting a 160-bit MAC as authorization
Secret and data memory can be write-pro-
tected (all or page 0 only) or put in EPROM-
emulation mode (“write to 0”, page 1)
Unique, factory-lasered and tested 64-bit reg-
istration number assures absolute traceability
because no two parts are alike
Built-in multidrop controller ensures compati-
bility with other 1-Wire net products
Reduces control, address, data and power to a
single data pin
Directly connects to a single port pin of a mi-
croprocessor and communicates at up to 16.3k
bits per second
Overdrive mode boosts communication speed
to 142k bits per second
Low cost 6-lead TSOC surface mount pack-
age, or solder-bumped Flipchip package
Reads and writes over a wide voltage range of
2.8V to 5.25V from -40°C to +85°C
PIN ASSIGNMENT
TSOC (150mil)
1-WIRE
GND
NC
1
2
3
6
5
4
NC
NC
NC
top view
side view
top view
See www.dalsemi.com for mechanical
specifications of packages.
ORDERING INFORMATION
DS2432P 6-lead TSOC package
DS2432P/T&R Tape & Reel DS2432P
DS2432X Flipchip package, tape & reel
DESCRIPTION
The DS2432 combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to 5
user read/write bytes, a 512-bit SHA-1 engine and a fully-featured 1-Wire interface in a single chip. Each
DS2432 has its own 64-bit ROM registration number that is factory lasered into the chip to provide a
guaranteed unique identity for absolute traceability. Data is transferred serially via the 1-Wire protocol,
which requires only a single data lead and a ground return. The DS2432 has an additional memory area
called the scratchpad that acts as a buffer when writing to the main memory, the register page or when
installing a new secret. Data is first written to the scratchpad from where it can be read back. After the
data has been verified, a copy scratchpad command will transfer the data to its final memory location,
provided that the DS2432 receives a matching 160-Bit MAC. The computation of the MAC involves the
secret and additional data stored in the DS2432 including the device’s registration number. Only a new
secret can be loaded without providing a MAC. The SHA-1 engine can also be activated to compute
DS2432
1k-Bit Protected 1-Wire
EEPROM with SHA-1 Engine
www.dalsemi.com
Preliminary
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Inhaltsverzeichnis

Seite 1 - EEPROM with SHA-1 Engine

1 of 30 040201FEATURES 1128 bits of 5V EEPROM memory parti-tioned into four pages of 256 bits, a 64-bitwrite-only secret and up to 5 general purpose

Seite 2 - DS2432 BLOCK DIAGRAM Figure 1

PRELIMINARY DS243210 of 30Memory and SHA Functions Flow Chart (continued) Figure 7*1-Wire idle high for powerFrom Figure 72nd PartTo Figure 72nd PartT

Seite 3 - 64-BIT LASERED ROM Figure 3

PRELIMINARY DS243211 of 30Memory and SHA Functions Flow Chart (continued) Figure 733hCompute NextSecret ?Valid DataAddress ?YNBus Master TXTA1 (T7:T0)

Seite 4 - DS2432 MEMORY MAP Figure 5

PRELIMINARY DS243212 of 30Memory and SHA Functions Flow Chart (continued) Figure 755hCopy Scratch-pad ?YNBus Master TXTA1 (T7:T0),TA2 (T15:T8),E/S Byt

Seite 5 - ADDRESS REGISTERS Figure 6

PRELIMINARY DS243213 of 30Memory and SHA Functions Flow Chart (continued) Figure 7A5hRead Auth.Page ?Bus Master TXTA1 (T7:T0), TA2 (T15:T8)YNYNAddress

Seite 6 - Write Scratchpad [0Fh]

PRELIMINARY DS243214 of 30Memory and SHA Functions Flow Chart (continued) Figure 7F0hRead Memory ?Address< 98h ?YNBus Master TXTA1 (T7:T0),TA2 (T15

Seite 7 - Load First Secret [5Ah]

PRELIMINARY DS243215 of 30Compute Next Secret [33h]Some applications may require a higher level of security than can be achieved by a single, directly

Seite 8

PRELIMINARY DS243216 of 30not write-protected the SHA engine will start and within 2.0 ms compute a new secret that is thenautomatically copied to th

Seite 9

PRELIMINARY DS243217 of 30Special attention is required when copying data to the register page. In order to prevent unintentionallocking of a special

Seite 10 - 10 of 30

PRELIMINARY DS243218 of 30that happens to reside in the scratchpad from a previous command as a challenge. The 160-bit MAC istransmitted in the same w

Seite 11 - 11 of 30

PRELIMINARY DS243219 of 30Read Memory [F0h]The read memory command may be used to read all memory except for the secret. Attempting to read thesecret

Seite 12 - 12 of 30

PRELIMINARY DS24322 of 30160-bit message authentication codes (MAC) when reading a memory page or to compute a new secret,instead of loading it. Appli

Seite 13 - 13 of 30

PRELIMINARY DS243220 of 30The variables A, B, C, D, E are initialized as follows:A := 67452301hB := EFCDAB89hC := 98BADCFEhD := 10325476hE:= C3D2E1F0h

Seite 14 - 14 of 30

PRELIMINARY DS243221 of 30HARDWARE CONFIGURATION Figure 8Open DrainPort PinRX = RECEIVETX = TRANSMIT100 ΩMOSFETVPUPRXTXTXRXDATARPU5 µATyp.BUS MASTER D

Seite 15 - Compute Next Secret [33h]

PRELIMINARY DS243222 of 30ROM FUNCTIONS FLOW CHART Figure 9From Figure 92nd PartTo Memory FunctionsFlow Chart (Figure 7)Master TX Bit 0Master TX Bit 6

Seite 16 - Copy Scratchpad [55h]

PRELIMINARY DS243223 of 30ROM FUNCTIONS FLOW CHART (continued) Figure 9To Figure 91st PartFrom Figure 91st PartFrom Figure 91st PartTo Figure 9, 1st P

Seite 17 - Read Authenticated Page [A5h]

PRELIMINARY DS243224 of 30Search ROM [F0h]When a system is initially brought up, the bus master might not know the number of devices on the1-Wire bus

Seite 18 - 18 of 30

PRELIMINARY DS243225 of 301-WIRE SIGNALINGThe DS2432 requires strict protocols to ensure data integrity. The protocol consists of four types of sig-na

Seite 19 - SHA-1 COMPUTATION ALGORITHM

PRELIMINARY DS243226 of 30Read/Write Time SlotsThe definitions of write and read time slots are illustrated in Figure 11. The master initiates all tim

Seite 20 - HARDWARE CONFIGURATION

PRELIMINARY DS243227 of 30Read-data Time SlotVPULLUPVIH MINVPULLUP MINVIL MAX0VtLOWRtREC∞<≤ RECts1µs120ts60 SLOTµµ<≤s15ts1LOWRµµ<≤REGULAR SPE

Seite 21 - ROM FUNCTION COMMANDS

PRELIMINARY DS243228 of 30With the Read Scratchpad command the CRC is generated by first clearing the CRC generator and thenshifting in the command co

Seite 22 - 22 of 30

PRELIMINARY DS243229 of 30ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground -0.5V to +5.5VOperating Temperature -40°C to +85°CStorage T

Seite 23 - 23 of 30

PRELIMINARY DS24323 of 3064-BIT LASERED ROMEach DS2432 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire familycode.

Seite 24 - 24 of 30

PRELIMINARY DS243230 of 30AC ELECTRICAL CHARACTERISTICSOVERDRIVE SPEED (VPUP=2.8V to 5.25V; -40°C to +85°C)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESTi

Seite 25 - 1-WIRE SIGNALING

PRELIMINARY DS24324 of 301-WIRE CRC GENERATOR Figure 4X0X1X2X3X4X5X6X7X8Polynomial = X8 + X5 + X4 + 11stSTAGE2ndSTAGE3rdSTAGE4thSTAGE6thSTAGE5thSTAGE7

Seite 26 - Read/Write Time Slots

PRELIMINARY DS24325 of 30The secret can be installed either by copying data from the scratchpad to the secrets memory or bycomputation using the curre

Seite 27 - OVERDRIVE SPEED

PRELIMINARY DS24326 of 30number of data bits sent by the master is not an integer multiple of 8 or if the data in the scratchpad is notvalid due to a

Seite 28

PRELIMINARY DS24327 of 308 bytes, especially if the data is to be loaded as a secret. If the master sends less than eight data bytes anddoes not read

Seite 29 - 29 of 30

PRELIMINARY DS24328 of 30Memory and SHA Functions Flow Chart Figure 70FhWrite Scratch-pad ?MasterTX Reset ?Master TX Data ByteTo ScratchpadBus Master

Seite 30 - OVERDRIVE SPEED (V

PRELIMINARY DS24329 of 30Memory and SHA Functions Flow Chart (continued) Figure 7AAhRead Scratch-Pad ?DS2432 sets ScratchpadByte Counter = 0Bus Master

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