Rainbow-electronics MAX188 Bedienungsanleitung

_______________General DescriptionThe MAX186/MAX188 are 12-bit data-acquisition sys-tems that combine an 8-channel multiplexer, high-band-width track/

MAX186/MAX188single-ended unipolar conversions on CH7 in externalclock mode without powering down between conver-sions. In external clock mode, the SS

2) Use a general-purpose I/O line on the CPU to pullCS on the MAX186/MAX188 low.3) Transmit TB1 and simultaneously receive a byteand call it RB1. Igno

MAX186/MAX188Internal and External Clock ModesThe MAX186/MAX188 may use either an external serialclock or the internal clock to perform thesuccessive-

Internal ClockIn internal clock mode, the MAX186/MAX188 generatetheir own conversion clock internally. This frees themicroprocessor from the burden of

MAX186/MAX188Data FramingThe falling edge of CS does not start a conversion on theMAX186/MAX188. The first logic high clocked into DIN isinterpreted a

Power-DownChoosing Power-Down ModeYou can save power by placing the converter in alow-current shutdown state between conversions.Select full power-dow

MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs16 ______________________________________________________________________________________Reference

MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs______________________________________________________________________________________ 17FULLPOWE

MAX186/MAX188Lowest Power at Higher ThroughputsFigure 14b shows the power consumption withexternal-reference compensation in fast power-down,with one

Using the buffered REFADJ input avoids externalbuffering of the reference. To use the direct VREF input,disable the internal buffer by tying REFADJ t

Relative Accuracy (Note 2)MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs2 ______________________________________________________________________

MAX186/MAX188High-Speed Digital Interfacing with QSPIThe MAX186/MAX188 can interface with QSPI at highthroughput rates using the circuit in Figure 19.

MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs______________________________________________________________________________________ 21*Title :

MAX186/MAX188;set delay between transfersLDD #$0800STD SPCR2 ;set ENDQP to $8 for 9 transfers***** Initialize QSPI Command R

MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs______________________________________________________________________________________ 23TMS320C3x

MAX186EVKIT-DIP Through-Hole MAX188_MJPMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim p

External Clock Frequency RangeMAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs____________________________________________________________________

MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs4 _______________________________________________________________________________________ELECTRICA

Note 1: Tested at VDD= 5.0V; VSS= 0V; unipolar input mode.Note 2: Relative accuracy is the deviation of the analog value at any code from its theoreti

Reference Voltage for analog-to-digital conversion. Also, Output of the Reference Buffer Amplifier(4.096V in the MAX186, 1.638 x REFADJ in the MAX188)

Digital GroundPositive Supply Voltage, +5V ±5%MAX186/MAX188Low-Power, 8-Channel,Serial 12-Bit ADCs____________________________________________________

MAX186/MAX188_______________Detailed DescriptionThe MAX186/MAX188 use a successive-approximationconversion technique and input track/hold (T/H) circui

Full ScaleV REFADJx A*Analog Input Range and Input ProtectionInternal protection diodes, which clamp the analoginput to VDDand VSS, allow the channel