
95
8048B–AVR–03/09
12.9.6 TCNT1 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNTn Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNTn) while the counter is running,
introduces a risk of missing a Compare Match between TCNTn and the OCRnx Registers.
12.9.7 OCR0A – Output Compare Register A
12.9.8 OCR1A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnA pin.
12.9.9 OCR0B – Output Compare Register B
12.9.10 OCR1B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnB pin.
12.9.11 TIMSK0 – Timer/Counter 0 Interrupt Mask Register
Bit 76543210
0x2D (0x4D) TCNT1[7:0] TCNT1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x36 (0x56) OCR0A[7:0] OCR0A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x2C (0x4C) OCR1A[7:0] OCR1A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x3C (0x5C) OCR0B[7:0] OCR0B
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x2B (0x4B) OCR1B[7:0] OCR1B
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543 210
0x39 (0x59) –––––OCIE0BOCIE0ATOIE0TIMSK0
Read/Write RRRRRR/WR/WR/W
Initial Value00000 000
Kommentare zu diesen Handbüchern