Rainbow-electronics ADC12L080 Bedienungsanleitung

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ADC12L080
12-Bit, 80 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Reference
General Description
The ADC12L080 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 80 Megasamples per second (MSPS). This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
minimize die size and power consumption while providing
excellent dynamic performance. The ADC12L080 can be
operated with either the internal or an external reference.
Operating on a single 3.3V power supply, this device con-
sumes just 425 mW at 80 MSPS, including the reference
current. The Power Down feature reduces power consump-
tion to just 50 mW.
The differential inputs provide a full scale input swing equal
to
±
V
REF
. The buffered, high impedance, single-ended ex-
ternal reference input is converted on-chip to a differential
reference for use by the processing circuitry. Output data
format may be selected as either offset binary or two’s
complement.
This device is available in the 32-lead LQFP package and
operates over the industrial temperature range of −40˚C to
+85˚C.
Features
n Single supply operation
n Low power consumption
n Power down mode
n Internal or external reference
n Selectable Offset Binary or 2’s Complement data format
n Pin-compatible with ADC12010, ADC12020, ADC12040,
ADC12L063, ADC12L066
Key Specifications
n Full Power Bandwidth 450 MHz
n DNL
±
0.4 LSB (typ)
n SNR (f
IN
= 10 MHz) 66 dB (typ)
n SFDR (f
IN
= 10 MHz) 80 dB (typ)
n Power Consumption, 80 MHz
Operating 425 mW (typ)
Power Down 50 mW (typ)
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communication Receivers
n Sonar/Radar
n xDSL
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
Connection Diagram
20061001
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
October 2004
ADC12L080 12-Bit, 80 MSPS, 450 MHz Bandwidth A/D Converter with Internal Reference
© 2004 National Semiconductor Corporation DS200610 www.national.com
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Inhaltsverzeichnis

Seite 1 - Internal Reference

ADC12L08012-Bit, 80 MSPS, 450 MHz Bandwidth A/D Converter withInternal ReferenceGeneral DescriptionThe ADC12L080 is a monolithic CMOS analog-to-digita

Seite 2 - Block Diagram

Timing Diagram20061009Output TimingTransfer Characteristic20061010FIGURE 1. Transfer CharacteristicADC12L080www.national.com 10

Seite 3

Typical Performance Characteristics DNL, INL VA=VD= 3.3V, VDR= 2.5V,VREF= 1.0V external, VCM= 1.65V, fCLK= 80 MHz, fIN= 0, unless otherwise stated.DNL

Seite 4

Typical Performance Characteristics DNL, INL VA=VD= 3.3V, VDR= 2.5V,VREF= 1.0V external, VCM= 1.65V, fCLK= 80 MHz, fIN= 0, unless otherwise stated. (C

Seite 5 - Package Thermal Resistances

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, VREF= 1.0V external,VCM= 1.65V, fCLK= 80 MHz, fIN= 70 MHz, unless otherwise stated.SNR,SIN

Seite 6

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, VREF= 1.0V external,VCM= 1.65V, fCLK= 80 MHz, fIN= 70 MHz, unless otherwise stated. (Conti

Seite 7 - AC Electrical Characteristics

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, VREF= 1.0V external,VCM= 1.65V, fCLK= 80 MHz, fIN= 70 MHz, unless otherwise stated. (Conti

Seite 8

Typical Performance Characteristics VA=VD= 3.3V, VDR= 2.5V, VREF= 1.0V external,VCM= 1.65V, fCLK= 80 MHz, fIN= 70 MHz, unless otherwise stated. (Conti

Seite 9 - Specification Definitions

Functional DescriptionOperating on a single +3.3V supply, the ADC12L080 uses apipeline architecture with error correction circuitry to helpensure maxi

Seite 10 - Transfer Characteristic

Applications Information (Continued)The full scale error in LSB for a sine wave input can bedescribed as approximatelyEFS=4096(1-sin(90˚ + dev))Where

Seite 11

Applications Information (Continued)3.3 PDThe PD pin, when high, holds the ADC12L080 in a power-down mode to conserve power when the converter is notb

Seite 12

Ordering InformationIndustrial (−40˚C ≤ TA≤ +85˚C) PackageADC12L080CIVY 32 Pin LQFPADC12L080EVAL Evaluation BoardBlock Diagram20061002ADC12L080www.nat

Seite 13

Applications Information (Continued)20061014FIGURE 5. Differential Drive Circuit of Figure 420061015FIGURE 6. Driving the Signal Inputs with a Transfo

Seite 14

Applications Information (Continued)5.0 POWER SUPPLY CONSIDERATIONSThe power supply pins should be bypassed with a 10 µFcapacitor and with a 0.1 µF lo

Seite 15

Applications Information (Continued)tween the converter’s input pins and ground or to the refer-ence input pin and ground should be connected to a ver

Seite 16

Physical Dimensions inches (millimeters) unless otherwise noted32-Lead LQFP PackageOrdering Number ADC12L080CIVYNS Package Number VBE32ANational does

Seite 17 - Applications Information

Pin Descriptions and Equivalent CircuitsPin No. Symbol Equivalent Circuit DescriptionANALOG I/O2VIN+Differential analog signal Input pins. With a 1.0V

Seite 18

Pin Descriptions and Equivalent Circuits (Continued)Pin No. Symbol Equivalent Circuit Description14–19,22–27D0–D11Digital data output pins that make u

Seite 19

Absolute Maximum Ratings(Notes 1, 2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distri

Seite 20

DC and Logic Electrical CharacteristicsUnless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA=VD= +3.3V, VDR

Seite 21

DC and Logic Electrical Characteristics (Continued)Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA=VD

Seite 22

AC Electrical Characteristics (Continued)20061007Note 8: To guarantee accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors ar

Seite 23 - 32-Lead LQFP Package

Specification DefinitionsAPERTURE DELAY is the time after the rising edge of theclock to when the input signal is acquired or held for conver-sion.APE

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