
268
ATmega32(L)
2503C–AVR–10/02
Notes: 1. t
WLRH
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock
bits commands.
2. t
WLRH_CE
is valid for the Chip Erase command.
SPI Serial Downloading Both the Flash and EEPROM memory arrays can be programmed using the serial SPI
bus while RESET
is pulled to GND. The serial interface consists of pins SCK, MOSI
(input), and MISO (output). After RESET
is set low, the Programming Enable instruction
needs to be executed first before program/erase operations can be executed. NOTE, in
Table 114 on page 268, the pin mapping for SPI programming is listed. Not all parts use
the SPI pins dedicated for the internal SPI interface.
SPI Serial Programming
Pin Mapping
Figure 136. SPI Serial Programming and Verify
(1)
Notes: 1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock
source to the XTAL1 pin.
2. V
CC
-0.3V < AVCC < V
CC
+0.3V, however, AVCC should always be within 2.7 - 5.5V
When programming the EEPROM, an auto-erase cycle is built into the self-timed pro-
gramming operation (in the serial mode ONLY) and there is no need to first execute the
t
BVDV
BS1 Valid to DATA valid 0 250 ns
t
OLDV
OE Low to DATA Valid 250 ns
t
OHDZ
OE High to DATA Tri-stated 250 ns
Table 113. Parallel Programming Characteristics, V
CC
= 5 V ± 10% (Continued)
Symbol Parameter Min Typ Max Units
Table 114. Pin Mapping SPI Serial Programming
Symbol Pins I/O Description
MOSI PB5 I Serial Data in
MISO PB6 O Serial Data out
SCK PB7 I Serial Clock
VCC
GND
XTAL1
SCK
MISO
MOSI
RESET
PB5
PB6
PB7
+2.7 - 5.5V
VCC
+2.7 - 5.5V
(2)
Kommentare zu diesen Handbüchern