General DescriptionThe MAX1067/MAX1068 low-power, multichannel, 14-bit analog-to-digital converters (ADCs) feature a suc-cessive-approximation ADC, in
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Detailed DescriptionThe MAX1067/MAX1068 low-power, multichannel, 14-bit ADCs feature a successive-approximation ADC,automatic power-down, integrated +
MAX1067/MAX1068During the acquisition, the analog input (AIN_) chargescapacitor CDAC. At the end of the acquisition intervalthe T/H switches open. The
that includes a longer acquisition time (11.5 clockcycles). Longer acquisition times are useful in applica-tions with input source resistances greater
MAX1067/MAX1068Digital InterfaceThe MAX1067/MAX1068 feature an SPI/QSPI/MICROWIRE-compatible 3-wire serial interface. TheMAX1067 digital interface con
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MAX1067/MAX1068Power-Down ModesTable 5 shows the MAX1067/MAX1068 power-downmodes. Three internal reference modes and one exter-nal reference mode are
minimum high and low times are at least 93ns. Externalclock-mode conversions with SCLK rates less than125kHz can reduce accuracy due to leakage of the
MAX1067/MAX1068prior to the rising edge of CS, cause zeros to beclocked out of DOUT. The MAX1068 external clock 16-bit-wide data-transfer mode require
sition. Use the EOC high-to-low transition as the signalto restart the external clock (SCLK). To read the entireconversion result, 16 SCLK cycles are
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MAX1067/MAX1068Internal Clock 16-Bit-Wide Data-Transfer andScan Mode (MAX1068 Only)Force DSPR high and DSEL low for the SPI/QSPI/MICROWIRE-interface m
DSP 8-Bit-Wide Data-Transfer Mode (External ClockMode, MAX1068 Only)Figure 16 shows the DSP-interface timing diagram.Logic low at DSPR on the falling
MAX1067/MAX10684.8MHz (the maximum clock frequency). For lowerclock frequencies, ensure the minimum high and lowtimes are at least 93ns. External-cloc
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DSP InterfaceThe DSP mode of the MAX1068 only operates in exter-nal clock mode. Figure 23 shows a typical DSP interfaceconnection to the MAX1068. Use
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Total Harmonic DistortionTotal harmonic distortion (THD) is the ratio of the RMSsum of the first five harmonics of the input signal to thefundamental
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MAX1067/MAX1068Multichannel, 14-Bit, 200ksps Analog-to-DigitalConvertersMaxim cannot assume responsibility for use of any circuitry other than circuit
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OFFSET ERROR vs. SUPPLY VOLTAGEMAX1067/68 toc17AVDD (V)OFFSET ERROR (µV)5.154.85 5.054.95-150-100-50050100150200-2004.75 5.25VREF = +4.096VGAIN ERROR
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