Rainbow-electronics MAX1068 Bedienungsanleitung PDF herunterladen (Seite 12)

MAX1067/MAX1068

During the acquisition, the analog input (AIN_) charges

capacitor C

DAC

. At the end of the acquisition interval

the T/H switches open. The retained charge on C

DAC

represents a sample of the input.

In hold mode, the capacitive DAC adjusts during the

remainder of the conversion cycle to restore node

ZERO to zero within the limits of 14-bit resolution. At the

end of the conversion, force CS high and then low to

reset the T/H switches back to track mode (AIN_),

where C

DAC

charges to the input signal again.

The time required for the T/H to acquire an input signal

is a function of how quickly its input capacitance is

charged. If the input signal’s source impedance is high,

the acquisition time lengthens and more time must be

allowed between conversions. The acquisition time

ACQ

) is the maximum time the device takes to acquire

the signal. Use the following formula to calculate acqui-

sition time:

ACQ

= 11(R

+ R

DS(ON)

) ✕ 45pF + 0.3µs

where R

= 340Ω, R

= the input signal’s source

impedance, R

DS(ON)

= 60Ω, and t

ACQ

is never less

than 729ns. A source impedance less than 200Ω does

not significantly affect the ADC’s performance. The

MAX1068 features a 16-bit-wide data-transfer mode

Multichannel, 14-Bit, 200ksps Analog-to-Digital

Converters

12 ______________________________________________________________________________________

REFERENCE

REF

REFCAP

AGND

AGND DGND

AIN0

AIN1

AIN2

AIN3

SCLK

DIN

ANALOG-INPUT

MULTIPLEXER

CONTROL

ACCUMULATOR

MEMORY

INPUT REGISTER

BIAS

OSCILLATOR

OUTPUT DOUT

EOC

ANALOG-SWITCH FINE TIMING

SUCCESSIVE-APPROXIMATION

MAX1067

DAC

BUFFER

RAIL

COMPARATOR

Figure 3. MAX1067 Functional Diagram

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 29 30

MAX1067/MAX1068 1
Converters 1

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