MAX1198
shifted with respect to the in-phase component. At the
receiver, the QAM signal is divided down into its I and
Q components, essentially representing the modulation
process reversed. Figure 10 displays the demodulation
process performed in the analog domain, using the
dual matched 3.3V, 8-bit ADC MAX1198 and the
MAX2451 quadrature demodulator to recover and
digitize the I and Q baseband signals. Before being
digitized by the MAX1198, the mixed down-signal com-
ponents may be filtered by matched analog filters, such
as Nyquist or pulse-shaping filters, which remove
unwanted images from the mixing process, thereby
enhancing the overall signal-to-noise (SNR) perfor-
mance and minimizing intersymbol interference.
Grounding, Bypassing,
and Board Layout
The MAX1198 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass V
DD
, REFP, REFN, and COM with
two parallel 0.1µF ceramic capacitors and a 2.2µF
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OV
DD
) to OGND. Multilayer
boards with separated ground and power planes
produce the highest level of signal integrity. Consider
the use of a split ground plane arranged to match the
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
18 ______________________________________________________________________________________
N.C.
NOTE: ONE FRONT-END REFERENCE CIRCUIT DESIGN MAY BE USED WITH UP TO 32 ADCs.
BYPASSING. PLACE CAPACITOR
THE OP AMP.
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