MAX1208
for two’s complement (G/T = 0)
where CODE
10
is the decimal equivalent of the digital
output code as shown in Table 2.
Digital outputs D11–D0 are high impedance when the
MAX1208 is in power-down (PD = high). D11–D0 transi-
tion high 10ns after the rising edge of PD and become
active 10ns after PD’s falling edge.
Keep the capacitive load on the MAX1208 digital outputs
D11–D0 as low as possible (<15pF) to avoid large digital
currents feeding back into the analog portion of the
MAX1208 and degrading its dynamic performance. The
addition of external digital buffers on the digital outputs
isolates the MAX1208 from heavy capacitive loading. To
improve the dynamic performance of the MAX1208, add
220Ω resistors in series with the digital outputs close to
the MAX1208. Refer to the MAX1211 evaluation kit
schematic for an example of the digital outputs driving a
digital buffer through 220Ω series resistors.
Power-Down Input (PD)
The MAX1208 has two power modes that are controlled
with the power-down digital input (PD). With PD low, the
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