General DescriptionThe MAX1363/MAX1364 low-power, 12-bit, 4-channelanalog-to-digital converters (ADCs) feature a digitallyprogrammable window comparat
MAX1363/MAX1364Power SupplyThe MAX1363 (2.7V to 3.6V) and MAX1364 (4.5V to5.5V) operate from a single supply and consume670µA (typ) at sampling rates
where RSOURCEis the analog-input source impedance,RIN= 2.5kΩ, and CIN= 22pF. For internal clock mode,tACQ= 1.5 / fSCL, and for external clock mode tAC
MAX1363/MAX1364External ClockSee the Configuration/Setup Bytes (Write Cycle) section.When configured for external clock mode (CLK = 1), theMAX1363/MAX
unsuccessful data transfers. An unsuccessful data trans-fer happens if a receiving device is busy or if a systemfault has occurred. In the event of an
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Software DescriptionConfiguration/Setup Bytes (Write Cycle)A write cycle begins with the bus master issuing aSTART condition followed by 7 address bit
MAX1363/MAX1364cycles begin with the bus master issuing a START condition followed by 7 address bits and a read bit (R/W = 1). After successfully rece
MAX1363/MAX13644-Channel, 12-Bit System Monitors with Programmable____________________________________________________________________________________
MAX1363/MAX1364When the MAX1363/MAX1364 receive a NACK, theyrelease SDA allowing the master to generate a STOP ora repeated START condition.Monitor Mo
clearing all alarms or by initiating an SMBus alert dur-ing an alarm condition (see the SMBus Alert section).The Delay 2, Delay 1, Delay 0 bits set th
MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert Response2 ______________________________________________
MAX1363/MAX1364bipolar mode, or set the lower threshold to 0x000 andthe upper threshold to 0xFFF for unipolar mode.Readback ModeSelect readback mode b
Resetting AlarmReset alarms by writing to monitor-setup data. See theConfiguring Monitor Mode section and Table 10.SMBus AlertThe SMBus-alert feature
MAX1363/MAX1364DefinitionsIntegral NonlinearityIntegral nonlinearity (INL) is the deviation of the valueson an actual transfer function from a straigh
MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert Response________________________________________________
MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert ResponseMaxim cannot assume responsibility for use of an
MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert Response________________________________________________
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MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert Response________________________________________________
Typical Operating Characteristics(VDD= 3.3V (MAX1363), VDD= 5V (MAX1364), fSCL= 1.7MHz, external clock, fSAMPLE= 94.4ksps, single-ended, unipolar, TA=
MAX1363/MAX13644-Channel, 12-Bit System Monitors with ProgrammableTrip Window and SMBus Alert Response________________________________________________
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Detailed DescriptionThe MAX1363/MAX1364 4-channel ADCs use succes-sive-approximation conversion techniques and fully dif-ferential input track/hold (T
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