MAX1717
Dynamically Adjustable, Synchronous
Step-Down Controller for Notebook CPUs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V+ = +15V, V
CC
= V
DD
= SKP/SDN = +5V, V
OUT
= 1.6V, T
A
= 0°C to +85°C, unless otherwise noted.)
Current-Limit Threshold
(Zero Crossing)
4
mVGND - LX
DH Gate Driver On-Resistance
1.0 3.5
ΩBST - LX forced to 5V
Current-Limit Default
Switchover Threshold
3V
CC
-1 V
CC
- 0.4 V
T
A
= 0°C to +85°C
85 115
T
A
= +25°C to +85°C
ILIM = REF (2V)
ILIM = 0.5V
PARAMETER MIN TYP MAX UNITS
Output Undervoltage Fault
Blanking Time
256
clks
Output Undervoltage Fault
Propagation Delay
10
µs
Output Undervoltage Fault
Protection Threshold
65 70 75
%
Overvoltage Fault Propagation
Delay
10
µs
Current-Limit Threshold
(Positive, Default)
90 100 110
Current-Limit Threshold
(Positive, Adjustable)
35 50 65
mV
165 200 230
REF Sink Current
Reference Load Regulation
0.01
V
10
µA
Overvoltage Trip Threshold
2.20 2.25 2.30
V
Current-Limit Threshold
(Negative)
-140 -110 -80
mV
Thermal Shutdown Threshold
150
°C
V
CC
Undervoltage Lockout
Threshold
4.1 4.4
V
1.0 3.5
DL Gate Driver On-Resistance
0.4 1.0
Ω
DH Gate-Driver Source/Sink
Current
1.3
A
DL Gate-Driver Sink Current
4
A
CONDITIONS
LX - GND, ILIM = V
CC
From SKP/SDN signal going high, clock speed set by R
TIME
Hysteresis = 10°C
FB forced 2% below trip threshold
With respect to unloaded output voltage
FB forced 2% above trip threshold
GND - LX, ILIM = V
CC
Rising edge, hysteresis = 20mV, PWM disabled below
this level
GND - LX
DL, high state (pullup)
DL, low state (pulldown)
DH forced to 2.5V, BST - LX forced to 5V
I
REF
= 0 to 50µA
DL forced to 2.5V
REF in regulation
Measured at FB
mV
VGATE Lower Trip Threshold
-8 -6.5 -5
%
Measured at FB with respect to unloaded output voltage,
rising edge, hysteresis = 1%
VGATE Upper Trip Threshold
+10 +12 +14
%
Measured at FB with respect to unloaded output voltage,
rising edge, hysteresis = 1%
VGATE Propagation Delay
10
µsFB forced 2% outside VGATE trip threshold
VGATE Output Low Voltage
0.4
VI
SINK
= 1mA
VGATE Transition Delay
1
clkAfter X = Y, clock speed set by R
TIME
VGATE Leakage Current
1
µAHigh state, forced to 5.5V
GATE DRIVERS
FAULT PROTECTION
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