Rainbow-electronics MAX5098A Bedienungsanleitung PDF herunterladen (Seite 22)

MAX5098A

Dual, 2.2MHz, Automotive Buck or Boost

Converter with 80V Load-Dump Protection

22 ______________________________________________________________________________________

bandwidth and phase margin. Use a simple pole-zero

pair (Type II) compensation if the output capacitor ESR

zero frequency is below the unity-gain crossover fre-

quency (f

). Type III compensation is necessary when

the ESR zero frequency is higher than f

or when com-

pensating for a continuous mode boost converter that

has a right-half-plane zero.

Use procedure 1 to calculate the compensation net-

work components when f

ZERO,ESR

< f

Buck Converter Compensation

Procedure 1 (See Figure 4)

1) Calculate the f

ZERO,ESR

and LC double-pole fre-

quencies:

2) Select the unity-gain crossover frequency:

If the f

ZERO,ESR

is lower than f

and close to f

, use a

Type II compensation network where R

provides a

midband zero f

MID,ZERO

, and R

provides a high-

frequency pole.

3) Calculate modulator gain G

at the crossover fre-

quency.

where V

OSC

is a peak-to-peak ramp amplitude equal to

1V.

The transconductance error amplifier gain is:

E/A

= g

x R

The total loop gain at f

should be equal to 1:

x G

E/A

= 1

4) Place a zero at or below the LC double pole:

5) Place a high-frequency pole at f

= 0.5 x f

Procedure 2 (See Figure 5)

If the output capacitor used is a low-ESR ceramic type,

the ESR frequency is usually far away from the targeted

unity crossover frequency (f

). In this case, Type III

compensation is recommended. Type III compensation

provides two-pole zero pairs. The locations of the zero

and poles should be such that the phase margin peaks

around f

. It is also important to place the two zeros at

or below the double pole to avoid the conditional stabil-

ity issue.

1) Select a crossover frequency:

2) Calculate the LC double-pole frequency, f

OUT OUT

××

2π

≤

fRC

SW F F

×××

()

−205 1π .

FLC

××

2π

V ESR f L V

V g ESR

OSC C OUT OUT

IN M

+××

()

×××

ESR

ESR f L V

OSC C OUT OUT

=×

+××

()

≤

ESR C

ZERO ESR

OUT

OUT OUT

××

FB_

COMP_

OUT

REF

Figure 4. Type II Compensation Network

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MAX5098A 1

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