MAX5380/MAX5381/MAX5382
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
4 _______________________________________________________________________________________
TIMING CHARACTERISTICS (continued)
(Figure 3; V
DD
= +2.7V to +3.6V (MAX5380), V
DD
= +4.5V to +5.5V (MAX5381), V
DD
= +2.7V to +5.5V (MAX5382); R
L
= 10kΩ;
C
L
= 50pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are T
A
= +25°C.) (Note 7)
Note 1: Guaranteed from code 5 to code 255.
Note 2: The offset value extrapolated from the range over which the INL is guaranteed.
Note 3: MAX5382 tested at V
DD
= +5V ±10%.
Note 4: MAX5380 tested at V
DD
= +3V ±10%, MAX5381 tested at V
DD
= 5V ±10%.
Note 5: Actual output voltages at full scale are 255/256 x V
REF
.
Note 6: Output settling time is measured by taking the code from code 5 to 255, and from code 255 to 5.
Note 7: Guaranteed by design.
Rise Time of Both SDA and
SCL Signals
t
r
300 ns
Fall Time of Both SDA and
SCL Signals
t
f
CONDITIONS
300 ns
Setup Time for STOP Condition t
SU:STO
0.6 µs
Capacitive Load for Each
Bus Line
C
b
400 pF
UNITSMIN TYP MAXSYMBOLPARAMETER
Typical Operating Characteristics
(V
DD
= +3.0V (MAX5380), V
DD
= +5.0V (MAX5381/MAX5382); R
L
= 10kΩ, T
A
= +25°C, unless otherwise noted.)
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