Rainbow-electronics MAX5887 Bedienungsanleitung PDF herunterladen (Seite 3)

MAX5887

3.3V, 14-Bit, 500Msps High Dynamic

Performance DAC with Differential LVDS Inputs

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AV

= DV

= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V

REFIO

= 1.25V, R

= 50Ω, I

OUT

= 20mA,

= T

MIN

to T

MAX

, unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characteriza-

tion. Typical values are at T

= +25°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

OUT

= 10MHz, -12dB FS

CLK

= 100MHz

OUT

= 30MHz, -12dB FS

OUT

= 10MHz, -12dB FS

OUT

= 16MHz, -12dB FS,

≥ +25°C

69 76

OUT

= 50MHz, -12dB FS

CLK

= 200MHz

OUT

= 80MHz, -12dB FS

OUT

= 10MHz, -12dB FS

OUT

= 30MHz, -12dB FS

OUT

= 50MHz, -12dB FS

Spurious-Free Dynamic Range to

Nyquist

SFDR

CLK

= 500MHz

OUT

= 80MHz, -12dB FS

dBc

CLK

= 100MHz

OUT1

= 9MHz, -6dB FS,

OUT2

= 10MHz, -6dB FS

-85

2-Tone IMD TTIMD

CLK

= 200MHz

OU T 1

= 79M H z, -6dB FS,

OU T 2

= 80M H z, -6dB FS

-61

dBc

4-Tone IMD, 1MHz Frequency

Spacing, GSM Model

FTIMD

CLK

= 300MHz f

OUT

= 32MHz, -12dB FS

-78 dBc

Adjacent Channel Leakage

Power Ratio, 4.1MHz Bandwidth,

WCDMA Model

ACLR

CLK

184.32MHz

OUT

= 61.44MHz 72 dB

Output Bandwidth

-1dB

(Note 2)

450

MHz

REFERENCE

Internal Reference Voltage Range

REFIO

1.12 1.22 1.32

Reference Voltage Drift

TCO

REF

±50

ppm/°C

Reference Input Compliance

Range

REFIOCR

0.1

1.25

Reference Input Resistance R

REFIO

10 kΩ

ANALOG OUTPUT TIMING

Output Fall Time t

FALL

90% to 10% (Note 3)

375

Output Rise Time t

RISE

10% to 90% (Note 3)

375

Output Voltage Settling Time

SETTLE

Output settles to 0.025% FS (Note 3) 11 ns

Output Propagation Delay t

(Note 3) 1.8 ns

Glitch Energy 1

pV-s

OUT

= 2mA 30

Output Noise N

OUT

= 20mA 30

pA/√Hz

TIMING CHARACTERISTICS

Data to Clock Setup Time t

SETUP

Referenced to rising edge of clock (Note 4) -0.8

Data to Clock Hold Time t

HOLD

Referenced to rising edge of clock (Note 4)

1.8 ns

1 2 3 4 5 6 7 8 ... 17 18

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