
119
AT8xC5122/23
4202E–SCR–06/06
Reset Value = 0001 0000b
Reset Value = 1000 0000b
Table 66. USB Global Interrupt Enable Register - USBIEN (S:BEh)
- - EWUPCPU EEORINT ESOFINT - - ESPINT
Bit Number
Bit
Mnemonic Description
7 - 6 -
Reserved
The value read from these bits is always 0. Do not change these bits.
5EWUPCPU
Enable Wake-up CPU Interrupt
Set this bit to enable Wake-up CPU Interrupt.
Clear this bit to disable Wake-up CPU Interrupt.
4 EEORINT
Enable End of Reset Interrupt
Set this bit to enable End of Reset Interrupt. This bit is set after reset.
Clear this bit to disable End of Reset Interrupt.
3 ESOFINT
Enable SOF Interrupt
Set this bit to enable SOF Interrupt.
Clear this bit to disable SOF Interrupt.
2-1 -
Reserved
The value read from these bits is always 0. Do not change these bits.
0 ESPINT
Enable Suspend Interrupt
Set this bit to enable Suspend Interrupts (See Table 65 on page 118).
Clear this bit to disable Suspend Interrupts.
Table 67. USB Address Register - USBADDR (S:C6h)
76543210
FEN UADD6 UADD5 UADD4 UADD3 UADD2 UADD1 UADD0
Bit
Number
Bit
Mnemonic Description
7FEN
Function Enable
Set this bit to enable the function. FADD is reset to 1.
Cleared this bit to disable the function.
6-0 UADD[6:0]
USB Address
This field contains the default address (0) after power-up or USB bus reset.
It should be written with the value set by a SET_ADDRESS request received by
the device firmware.
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