
BR24L16-W / BR24L16F-W / BR24L16FJ-W /
Memory ICs
BR24L16FV-W / BR24L16FVM-W
24/25
2
300
100
200
0
−100
−200
01 34 65
INPUT DATA SET UP TIME : t
SU:DAT
(ns)
Fig.35 Input data setup time
t
SU:DAT(HIGH)
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
300
100
200
0
−100
−200
01 34 65
INPUT DATA SET UP TIME : t
SU:DAT
(ns)
Fig.36 Input data setup time
t
SU:DAT(LOW)
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
4
2
3
1
0
01 34 65
OUTPUT DATA DELAY TIME : t
PD
(µs)
Fig.37 Output data delay time
t
PD0
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC2
SPEC1
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
4
2
3
1
0
01 34 65
OUTPUT DATA DELAY TIME : t
PD
(µs)
Fig.38 Output data delay time
t
PD1
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC2
SPEC1
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
4
2
3
1
0
01 34 65
OUTPUT DATA HOLD TIME : t
DH
(µs)
Fig.39 Output data hold time
t
DH0
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC2
SPEC1
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
4
2
3
1
0
01 34 65
OUTPUT DATA HOLD TIME : t
DH
(µs)
Fig.40 Output data hold time
t
DH1
SUPPLY VOLTAGE : V
CC
(V)
SPEC2
SPEC2
SPEC1
SPEC1
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
5
3
4
2
1
0
01 34 65
STOP CONDITION SET UP TIME : t
SU:STO
(µs)
Fig.41 Stop condition setup time
t
SU:STO
SUPPLY VOLTAGE : V
CC
(V)
SPEC1
SPEC2
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
5
3
4
2
1
0
01 34 65
BUS OPEN TIME
BEFORE TRANSMISSION : t
BUF
(µs)
Fig.42 BUS free time t
BUF
SUPPLY VOLTAGE : V
CC
(V)
SPEC1
SPEC2
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
2
6
3
4
5
2
1
0
01 34 65
INTERNAL WRITING CYCLE TIME : t
WR
(ms)
Fig.43 Write cycle time tWR
SUPPLY VOLTAGE : V
CC
(V)
SPEC1,2
Ta=85°C
Ta=25°C
Ta=−40°C
SPEC1 : FAST-MODE
SPEC2 : STANDARD-MODE
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