General DescriptionThe DS1372 is a 32-bit binary up counter and 24-bitdown counter with a unique 64-bit ID. The counters, ID,configuration, and status
DS1372Accordingly, the following bus conditions have beendefined:Bus not busy: Both data and clock lines remainhigh.Start data transfer: A change in t
2) Slave transmitter mode (DS1372 read mode): Thefirst byte is received and handled as in the slavereceiver mode. However, in this mode, the direction
DS1372Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent license
DS13722 _______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSRECOMMENDED DC ELECTRICAL CHARA
DS1372_______________________________________________________________________________________ 3Note 1: Limits at -40°C are guaranteed by design and no
DS13724 _______________________________________________________________________________________Pin DescriptionPIN NAME FUNCTION1, 2 X1, X2 Connection
Detailed DescriptionThe DS1372 is a 32-bit binary counter designed to con-tinuously count time in seconds. An additional counteris provided that can g
DS1372Alarm OperationThe alarm counter is a 24-bit counter in the addressrange 04h–06h. When the alarm counter is written, aseed register is written w
Control Register (07h)Bit 7: Enable Oscillator (EOSC). When set to logic 0,the oscillator is started. When set to logic 1, the oscilla-tor is stopped.
DS1372Status Register (08h)Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bitindicates that the oscillator either is stopped or wasstopped for s
conditions. The DS1372 operates as a slave on the I2Cbus. Connections to the bus are made through the SCLinput and open-drain SDA I/O lines. Within th
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