1 of 14 100899FEATURES Ultra-lowpower consumption, quiet, pumplessdesign Two digitally controlled, 256-positionpotentiometers Serial port provides
DS186810 of 14
DS186811 of 14CAPACITANCE (tA=25°C)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESInput Capacitance CIN5 pF 3, 6Output Capacitance COUT7 pF 3, 6AC ELECTRICAL
DS186812 of 14TIMING DIAGRAMS Figure 9(a) 3-Wire Serial Interface General Overview(b) Start of Communication Transaction(c) End of Communication Trans
DS186813 of 14DIGITAL OUTPUT LOAD SCHEMATIC Figure 10TYPICAL SUPPLY CURRENT VS. SERIAL CLOCK RATE Figure 11
DS186814 of 14DS1868 20-PIN TSSOPDIM MIN MAXA MM-1.10A1 MM0.05 -A2 MM0.75 1.05C MM0.09 0.18L MM0.50 0.70e1 MM0.65 BSCB MM0.18 0.30D MM6.40 6.90E MM4.4
DS18682 of 14wiper on the resistor array is set by an 8-bit value that controls which tap point is connected to the wiperoutput. Communication and co
DS18683 of 14DS1868 BLOCK DIAGRAM Figure 1I/O SHIFT REGISTER Figure 2Transmission of data always begins with the stack select bit followed by the pote
DS18684 of 14potentiometer-0 wiper. If the stack select bit has value 1, the multiplexed output, S OUT, will be that of thepotentiometer-1 wiper.
DS18685 of 14STACKED CONFIGURATION Figure 3CASCADE OPERATIONA feature of the DS1868 is the ability to control multiple devices from a single processor
DS18686 of 14ABSOLUTE AND RELATIVE LINEARITYAbsolute linearity is defined as the difference between the actual measured output voltage and theexpected
DS18687 of 14DS1868 ABSOLUTE AND RELATIVE LINEARITY Figure 6TYPICAL APPLICATION CONFIGURATIONSFigures 7 and 8 show two typical application configurati
DS18688 of 14VARIABLE GAIN AMPLIFIER Figure 7FIXED GAIN ATTENUATOR Figure 8
DS18689 of 14ABSOLUTE MAXIMUM RATINGS*Voltage on Any Pin Relative to Ground (VB=GND) -1.0V to +7.0VVoltage on Any Pin when VB=-3.3V -3.3V to +4.7VOper
Kommentare zu diesen Handbüchern