1 of 20 043001 FEATURES • Unique 1-wire interface requires only one port pin for communication • Each device has a unique 64-bit serial co
DS1822 10 of 20 SKIP ROM [CCh] The master can use this command to address all devices on the bus simultaneously without sending out any ROM code inf
DS1822 11 of 20 is issued the master must enable a strong pullup on the 1-wire bus for at least 10 ms as described in the POWERING THE DS1822 sectio
DS1822 12 of 20 ROM COMMANDS FLOW CHART Figure 11 CCh SKIP ROM COMMAND MASTER TX RESET P
DS1822 13 of 20 DS1822 FUNCTION COMMANDS FLOW CHART Figure 12 MASTER TX FUNCTION COMMAND YN 44h CONVERT TEMPERATURE ? PARASITE POWER ? N Y DS1822
DS1822 14 of 20 1-WIRE SIGNALING The DS1822 uses a strict 1-wire communication protocol to insure data integrity. Several signal types are defined b
DS1822 15 of 20 The DS1822 samples the 1-wire bus during a window that lasts from 15 µs to 60 µs after the master initiates the write time slot. If
DS1822 16 of 20 data from the DS1822 is valid for 15 µs after the falling edge that initiated the read time slot. Therefore, the master must releas
DS1822 17 of 20 DS1822 OPERATION EXAMPLE 1 In this example there are multiple DS1822s on the bus and they are using parasite power. The bus master
DS1822 18 of 20 ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to ground –0.5V to +6.0V Operating temperature –55°C to +125°C Storage tempe
DS1822 19 of 20 AC ELECTRICAL CHARACTERISTICS: NV MEMORY (-55°C to +100°C; VDD=3.0V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NV Writ
DS1822 2 of 20 DETAILED PIN DESCRIPTIONS Table 1 8-PIN SOIC* TO-92 SYMBOL DESCRIPTION 5 1 GND Ground. 4 2 DQ Data Input/Output pin. Open-drain 1
DS1822 20 of 20 TIMING DIAGRAMS Figure 18
DS1822 3 of 20 OPERATION – MEASURING TEMPERATURE The core functionality of the DS1822 is its direct-to-digital temperature sensor. The resolution of
DS1822 4 of 20 OPERATION – ALARM SIGNALING After the DS1822 performs a temperature conversion, the temperature value is compared to the user-defined
DS1822 5 of 20 The use of parasite power is not recommended for temperatures above 100°C since the DS1822 may not be able to sustain communications
DS1822 6 of 20 MEMORY The DS1822’s memory is organized as shown in Figure 7. The memory consists of an SRAM scratchpad with nonvolatile EEPROM stor
DS1822 7 of 20 CONFIGURATION REGISTER Byte 4 of the scratchpad memory contains the configuration register, which is organized as illustrated in Figu
DS1822 8 of 20 is available in Application Note 27 entitled “Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor Touch Memory
DS1822 9 of 20 TRANSACTION SEQUENCE The transaction sequence for accessing the DS1822 is as follows: Step 1. Initialization Step 2. ROM Command (f
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