1 of 21 043001 FEATURES • Unique 1-wire interface requires only one port pin for communication • Each device has a unique 64-bit serial co
DS18B20X 10 of 21 SKIP ROM [CCh] The master can use this command to address all devices on the bus simultaneously without sending out any ROM code i
DS18B20X 11 of 21 is issued the master must enable a strong pullup on the 1-wire bus for at least 10 ms as described in the POWERING THE DS18B20X se
DS18B20X 12 of 21 ROM COMMANDS FLOW CHART Figure 11 DS18B20X TX BIT 0DS18B20X TX BIT 0MA
DS18B20X 13 of 21 DS18B20X FUNCTION COMMANDS FLOW CHART Figure 12 MASTER TX FUNCTION COMMAND YN 44h CONVERT TEMPERATURE ? PARASITE POWER ? N Y DS1
DS18B20X 14 of 21 1-WIRE SIGNALING The DS18B20X uses a strict 1-wire communication protocol to insure data integrity. Several signal types are defin
DS18B20X 15 of 21 The DS18B20X samples the 1-wire bus during a window that lasts from 15 µs to 60 µs after the master initiates the write time slot.
DS18B20X 16 of 21 Therefore, the master must release the bus and then sample the bus state within 15 µs from the start of the slot. Figure 15 illust
DS18B20X 17 of 21 DS18B20X OPERATION EXAMPLE 1 In this example there are multiple DS18B20Xs on the bus and they are using parasite power. The bus m
DS18B20X 18 of 21 ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to ground –0.5V to +6.0V Operating temperature –55°C to +125°C Storage tem
DS18B20X 19 of 21 AC ELECTRICAL CHARACTERISTICS: NV MEMORY (-55°C to +100°C; VDD=3.0V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NV Wr
DS18B20X 2 of 21 DETAILED PIN DESCRIPTIONS Table 1 SYMBOL DESCRIPTION GND Ground. DQ Data Input/Output pin. Open-drain 1-wire interface pin. Also
DS18B20X 20 of 21 TIMING DIAGRAMS Figure 18
DS18B20X 21 of 21 DS18B20X MECHANICAL SPECIFICATION
DS18B20X 3 of 21 OPERATION – MEASURING TEMPERATURE The core functionality of the DS18B20X is its direct-to-digital temperature sensor. The resolutio
DS18B20X 4 of 21 OPERATION – ALARM SIGNALING After the DS18B20X performs a temperature conversion, the temperature value is compared to the user-def
DS18B20X 5 of 21 The use of parasite power is not recommended for temperatures above 100°C since the DS18B20X may not be able to sustain communicati
DS18B20X 6 of 21 MEMORY The DS18B20X’s memory is organized as shown in Figure 7. The memory consists of an SRAM scratchpad with nonvolatile EEPROM
DS18B20X 7 of 21 CONFIGURATION REGISTER Byte 4 of the scratchpad memory contains the configuration register, which is organized as illustrated in Fi
DS18B20X 8 of 21 the shift register will contain all 0s. Additional information about the Dallas 1-wire cyclic redundancy check is available in Appl
DS18B20X 9 of 21 TRANSACTION SEQUENCE The transaction sequence for accessing the DS18B20X is as follows: Step 1. Initialization Step 2. ROM Comman
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