1 of 31 110501FEATURES§ Open drain PIO pins are controlled and theirlogic level can be determined over 1-Wire®bus for closed-loop control§ Replac
DS240610 of 31Memory Function Flow Chart Figure 7SpareVerticalF0hRead Memory?TA1(T7:T0), TA2 (T15:T8)Bus Master TX Address = (T15:T0)DS2406 sets Memor
DS240611 of 31Memory Function Flow Chart (continued) Figure 7SpareVerticalWrite Memory?TA1(T7:T0), TA2 (T15:T8)Bus Master TX Address = (T15:T0)DS2406
DS240612 of 31Memory Function Flow Chart (continued) Figure 7SpareVerticalAAhRead Status?TA1(T7:T0), TA2 (T15:T8)Bus Master TX Address = (T15:T0)DS240
DS240613 of 31Write Memory [0Fh]The Write Memory command is used to program the 1024-bit EPROM data memory. The details of thefunctional flow chart ar
DS240614 of 31Most easily understood are the bits CHS0 and CHS1, which select the channels to communicate with.One can select one of the two channels
DS240615 of 31The TOG bit of Channel Control Byte 1 specifies if one is always reading or writing (TOG = 0) or if oneis going to change from reading t
DS240616 of 31After the Channel Control bytes have been transmitted the bus master receives the Channel Info byte(Figure 9). This byte indicates the s
DS240617 of 31TWO-CHANNEL WRITE Figure 10c1-WIREtd1PIO-A15 µs < td1 < 60 µs200 ns < td0 < 300 nsPIO-BPIO-APIO-BIC=1, SYNCHRONOUS MODEIC=0,
DS240618 of 31DS2406 EQUIVALENT CIRCUIT Figure 111-Wire InterfacePIOGroundPIO ChannelResetD"1"QQActivityLatchDQQ1-Wire DATAChannelFlip-Flopt
DS240619 of 31INITIALIZATIONAll transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequenceconsists of a reset p
DS24062 of 31ADDRESSABLE SWITCH DESCRIPTIONThe DS2406 Dual Addressable Switch™ Plus Memory offers a simple way to remotely control a pair ofopen drain
DS240620 of 31ROM FUNCTIONS FLOW CHART Figure 13SpareVertical33hRead ROM?CommandRYNCChSkip ROM?CommandYNSFamily CodeDS2406 TX(1 Byte)DS2406 TXCRC Byte
DS240621 of 31Conditional Search ROM [ECh]The Conditional Search ROM command operates similarly to the Search ROM command except that onlydevices fulf
DS240622 of 31The activity latch (Figure 11) captures an event for interrogation by the bus master at a later time. Thisway, the bus master needs not
DS240623 of 311-WIRE SIGNALINGThe DS2406 requires strict protocols to ensure data integrity. The protocol consists of five types ofsignaling on one li
DS240624 of 31READ/WRITE TIMING DIAGRAM Figure 15Write-one Time Slot15µs60µsDS2406Sampling WindowVPULLUPVPULLUP MINVIH MINVIL MAX0VtSLOTtRECtLOW160 µs
DS240625 of 31READ/WRITE TIMING DIAGRAM (continued) Figure 15Read-data Time SlotRESISTORMASTERDS2406MasterSampling Window60 µs £ tSLOT < 120 µs1 µs
DS240626 of 31PROGRAM PULSE TIMING DIAGRAM Figure 16Resistor pull-upLINE TYPE LEGEND:Bus master active high(12 V @ 10 mA)VPULLUPVPPGND480 µstRPtFPtDPt
DS240627 of 31initial pass through the Extended Read Memory flow chart the 16-bit CRC value is the result of shiftingthe command byte into the cleared
DS240628 of 31ABSOLUTE MAXIMUM RATINGS*Voltage on DATA or PIO-A to Ground -0.5V to +13.0VVoltage on VCC or PIO-B to Ground -0.5V to +6.5VOperating Tem
DS240629 of 31CAPACITANCES (tA = 25°C)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESCapacitance DATA Pin CD800 pF 7Capacitance PIO-A Pin CA100 pFCapacitance
DS24063 of 31OVERVIEWThe block diagram in Figure 1 shows the relationships between the major control and memory sections ofthe DS2406. The device has
DS240630 of 31PIO SINK CURRENT10 mA20 mA30 mA40 mA50 mA60 mA70 mA80 mA90 mA100 mAISA, ISB@ 0.4VVPUPPIO-Bmax.min.PIO-Amax.min.4V 5V 6V2.8VNOTES:1. All
DS240631 of 3116. The duration of the low pulse sent by the master should be a minimum of 1µs with a maximum valueas short as possible to allow time f
DS24064 of 31PARASITE POWERThe DS2406 can derive its power entirely from the 1-Wire bus by storing energy on an internal capacitorduring periods of ti
DS24065 of 31MEMORY MAPThe DS2406 has two memory sections, called data memory and status memory. The data memoryconsists of 1024 bits of one-time prog
DS24066 of 31STATUS MEMORYThe Status Memory can be read or written to indicate various conditions to the software interrogating theDS2406. These condi
DS24067 of 31Status Memory location 7 serves three purposes: 1) it holds the selection code for the Conditional Searchfunction, 2) provides the bus ma
DS24068 of 31Extended Read Memory [A5h]The Extended Read Memory command supports page redirection when reading data from the 1024-bitEPROM data field.
DS24069 of 31WRITING EPROM MEMORYThe function flow for writing to the Data Memory and Status Memory is almost identical. After theappropriate write co
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