Rainbow-electronics ATR0630 Bedienungsanleitung

Stöbern Sie online oder laden Sie Bedienungsanleitung nach GPS-Empfänger Rainbow-electronics ATR0630 herunter. Rainbow Electronics ATR0630 User Manual [de] [cs] Benutzerhandbuch

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Features
16-channel GPS Correlator
8192 Search Bins with GPS Acquisition Accelerator
Accuracy: 2.5m CEP (2D, Stand Alone)
Time to First Fix: 34s (Cold Start)
Acquisition Sensitivity: –139 dBm (With External LNA)
Tracking Sensitivity: –149 dBm (With External LNA)
Utilizes the ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
High-performance 32-bit RISC Architecture
Embedded ICE (In-Circuit Emulation)
128 Kbytes Internal RAM
384 Kbytes Internal ROM with u-blox GPS Firmware
1.5-bit ADC On-chip
Single IF Architecture
2 External Interrupts
24 User-programmable I/O Lines
1 USB Device Port
Universal Serial Bus (USB) 2.0 Full-speed Device
Embedded USB V2.0 Full-speed Transceiver
2 USARTs
Master/Slave SPI Interface
4 External Slave Chip Selects
Programmable Watchdog Timer
Advanced Power Management Controller (APMC)
Geared Master Clock to Reduce Power Consumption
Sleep State with Disabled Master Clock
Hibernate State with 32.768 kHz Master Clock
Real Time Clock (RTC)
1.8V to 3.3V User-definable IO Voltage for Several GPIOs with 5V Tolerance
4 KBytes of Battery Backup Memory
7 mm × 10 mm 96 Pin BGA Package, 0.8 mm Pitch, Pb-free, RoHS-compliant
Benefits
Fully Integrated Design With Low BOM
No External Flash Memory Required
Requires Only a GPS XTAL, No TCXO
Supports NMEA, UBX Binary and RTCM Protocol
Supports SBAS (WAAS, EGNOS, MSAS)
Up to 4Hz Update Rate
Supports A-GPS (Aiding)
Excellent Noise Performance
ANTARIS4
Single-chip
GPS Receiver
ATR0630
Preliminary
Rev. 4920A–GPS–01/06
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Inhaltsverzeichnis

Seite 1 - Preliminary

Features•16-channel GPS Correlator – 8192 Search Bins with GPS Acquisition Accelerator– Accuracy: 2.5m CEP (2D, Stand Alone)– Time to First Fix: 34s (

Seite 2

104920A–GPS–01/06ATR0630 [Preliminary] Boot SectionC6 BOOT_MODE DIGITAL IN - Leave open, internal pull downReset A7 NRESET DIGITAL IN Low Reset i

Seite 3

114920A–GPS–01/06 ATR0630 [Preliminary] Active Antenna SupervisionC8 NANTSHORT DIGITAL IN Low Active antenna short detection InputG5, G6 NAADET0/NAA

Seite 4

124920A–GPS–01/06ATR0630 [Preliminary] 3.3 Setting GPSMODE0 to GPSMODE12The start-up configuration of this ROM-based system without external non-vol

Seite 5

134920A–GPS–01/06 ATR0630 [Preliminary] 3.3.2 Sensitivity Settings3.4 Serial I/O ConfigurationThe ATR0630 features a two-stage I/O-message and protoc

Seite 6

144920A–GPS–01/06ATR0630 [Preliminary] The following message settings are used in the tables below:The following settings apply if GPSMODE configura

Seite 7

154920A–GPS–01/06 ATR0630 [Preliminary] 3.4.1 USB Power ModeFor correct response to the USB host queries, the device has to know its power mode. This

Seite 8

164920A–GPS–01/06ATR0630 [Preliminary] The Antenna Supervisor Software will be configured as follows:1. Enable Control Signal2. Enable Short Circuit

Seite 9

174920A–GPS–01/06 ATR0630 [Preliminary] 3.4.3 External Connections for a Working GPS SystemFigure 3-2. Example of an External Connection (ATR0630) AT

Seite 10 - ATR0630 [Preliminary]

184920A–GPS–01/06ATR0630 [Preliminary] Table 3-15. Recommended Pin Connections Pin Name Recommended External CircuitP0/NANTSHORTInternal pull-down r

Seite 11 - ATR0630 [Preliminary]

194920A–GPS–01/06 ATR0630 [Preliminary] 3.5 Connecting an Optional Serial EEPROMThe ATR0630 offers the possibility of connecting an external serial E

Seite 12

24920A–GPS–01/06ATR0630 [Preliminary] 1. DescriptionThe ATR0630 is a low-power, single-chip GPS receiver, especially designed to meet the requiremen

Seite 13

204920A–GPS–01/06ATR0630 [Preliminary] 4. Power SupplyThe ATR0630 is supplied with six distinct supply voltages:• The power supplies for the RF part

Seite 14

214920A–GPS–01/06 ATR0630 [Preliminary] Figure 4-1. Connecting Example: Separate Power Supplies for RF and Digital Part Using the Internal LDOs The A

Seite 15

224920A–GPS–01/06ATR0630 [Preliminary] The RTC section will be initialized properly if VDD18 is supplied first to the ATR0630. If VBAT is applied fi

Seite 16

234920A–GPS–01/06 ATR0630 [Preliminary] Figure 4-3. Connecting Example: Separate Power Supplies for RF and Digital Part Using 1.8V from Host System A

Seite 17

244920A–GPS–01/06ATR0630 [Preliminary] Figure 4-4. Connecting Example: Power Supply from USB Using the Internal LDOs ATR0630 internalVDDUSB1.5V to 3

Seite 18

254920A–GPS–01/06 ATR0630 [Preliminary] 5. CrystalsThe ATR0630 only needs a GPS crystal (XTAL), but supports also TCXOs. The reference fre-quency is

Seite 19

264920A–GPS–01/06ATR0630 [Preliminary] Figure 5-3. Equivalent Application Examples Using a GPS TCXO (See Table 5-3 on page 27) Figure 5-4. Applicati

Seite 20

274920A–GPS–01/06 ATR0630 [Preliminary] Note: All other parameters as specified in Table 5-1.Table 5-1. Specification of GPS Crystals Appropriate for

Seite 21

284920A–GPS–01/06ATR0630 [Preliminary] 5.2 RTC OscillatorFigure 5-5. Crystal Connection XT_INXT_OUTRTCATR0630 internal32 kHzCrystalOscillator32.768

Seite 22

294920A–GPS–01/06 ATR0630 [Preliminary] 7. HandlingThe ATR0630 is an ESD-sensitive device. The current ESD values are to be defined. Observe proper p

Seite 23

34920A–GPS–01/06 ATR0630 [Preliminary] 2. Architectural Overview2.1 Block DiagramFigure 2-1. ATR0630 Block Diagram NSLEEPNSHDNXT_INTMSTCKTDOTDINTRSTD

Seite 24

304920A–GPS–01/06ATR0630 [Preliminary] 8. Operating RangeParameters Pins Symbol Min Typ Max UnitAnalog supply voltage RF VCC1, VCC2, VBP VCC2.70 3.3

Seite 25

314920A–GPS–01/06 ATR0630 [Preliminary] 2.4 AGC cut-off frequency Cext = open A4 f3dB_AGC250 kHz2.5 AGC cut-off frequency Cext = 100 pF A4 f3dB_AGC33

Seite 26

324920A–GPS–01/06ATR0630 [Preliminary] 7.5Low-level input voltage VDDIO domainVDDIO = 1.65V to 3.6V VIL,IO–0.3 +0.41 V7.6High-level input voltage V

Seite 27

334920A–GPS–01/06 ATR0630 [Preliminary] 7.24Input pull-down resistors DBG_EN, NTRST, RF_ON–40°C to +85°C E8, H11 RPD718kΩ7.25Input pull-down resistor

Seite 28

344920A–GPS–01/06ATR0630 [Preliminary] 12. Package Information 11. Ordering InformationExtended Type Number Package MPQ RemarksATR0630-7KQY BGA96 20

Seite 29

Printed on recycled paper.4920A–GPS–01/06© Atmel Corporation 2006. All rights reserved. Atmel®, logo and combinations thereof, Everywhere You Are® an

Seite 30

44920A–GPS–01/06ATR0630 [Preliminary] 2.2 General DescriptionThe ATR0630 has been designed especially for mobile applications. It provides high isol

Seite 31

54920A–GPS–01/06 ATR0630 [Preliminary] 2.7 VGA/AGCThe on-chip automatic gain control (AGC) stage sets the gain of the VGA in order to optimally load

Seite 32

64920A–GPS–01/06ATR0630 [Preliminary] 3. Pin Configuration3.1 PinoutFigure 3-1. Pinning BGA96 (Top View) Table 3-1. ATR0630 Pinout Pin Name BGA 96

Seite 33

74920A–GPS–01/06 ATR0630 [Preliminary] GNDA B4 SupplyGNDA D2 SupplyGNDA E1 SupplyGNDA E2 SupplyGNDA E3 SupplyGNDA F1 SupplyGNDA F2 SupplyGNDA F3 Supp

Seite 34

84920A–GPS–01/06ATR0630 [Preliminary] P20 G7 Digital I/O Configurable (PD) TIMEPULSE SCK2 SCK2P21 E6 Digital I/O Configurable (PU) TXD2 TXD2P22 D10

Seite 35 - Regional Headquarters

94920A–GPS–01/06 ATR0630 [Preliminary] 3.2 Signal DescriptionVDD_USB(3)A10 SupplyVDD18 H9 SupplyVDD18 G11 SupplyVDD18 F12 SupplyVDD18 B9 SupplyVDD18

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