
Timing Diagrams (Continued)
ADC1038/ADC1034 CS
Low Continuously
TL/H/10556– 16
C
CLK
continuously enabled
Multiplexer Address/Channel Assignment Tables
ADC1038
MUX Address Analog
A2 A1 A0
Channel
Selected
0 0 0 CH0
0 0 1 CH1
0 1 0 CH2
0 1 1 CH3
1 0 0 CH4
1 0 1 CH5
1 1 0 CH6
1 1 1 CH7
ADC1034
MUX Address Analog
A2 A1 A0
Channel
Selected
X 0 0 CH0
X 0 1 CH1
X 1 0 CH2
X 1 1 CH3
Note: ‘‘X’’
e
don’t care
8
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