Rainbow-electronics AT73C246 Bedienungsanleitung PDF herunterladen (Seite 34)

11050A–PMAAC–07-Apr-10

AT73C246

Figure 11-7. AT73C246 - RUN to STANDBY state Supplies Shutdown timing diagram.

Note: 1. VDDx activity during STANDBY state is set by register PMU_STANDBY_SUPPLIES.

2. VDDx activity during RUN state is set by Bit7 of register VDDx_CTRL.

11.4.4 HRST STATE

HRST state is a transition state used to restart the CPU:

•VDD

{0,1,2,3,4}

are switched off according to figure Figure 11-8 on page 35 depending on the

previous state

•VDD

is ON

• RSTB pin is forced to ground

Table 11-6. RUN to STANDBY state timing table

Symbol Parameter Comments Min Typ Max Units

STANDBY

STANDBY Event

Detection Time

150 160 170 µs

PWM

PFM/PWM Switching

time

Time from validated WAKEUP event (end of debounce

time when applicable) to PFM/PWM switching if

applicable.

460 500 540 µs

WAIT

WAKEUP Event

Detection Window

If a WAKEUP event occurs in this window the PMU

automatically restart at the end of the STANDBY

process.

150 160 170 µs

OFF_AUDIO

Audio CODEC

Shutdown Time

Audio CODEC is ON 486 512 538 ms

Audio CODEC is OFF 58 62 66 µs

OFF_VDDx

VDDx SHUTDOWN

Time

VDDx is OFF during both STANBY

(1)

and RUN

(2)

states. 58 62 66 µs

VDDx is OFF during STANBY state

(1)

VDDx is ON during RUN state

(2)

4.8 5.2 5.4 ms

ON_VDDx

VDDx STARTUP Time

VDDx is ON during STANBY state

(1)

VDDx is OFF during RUN state

(2)

4.8 5.2 5.4 ms

VDDx is ON during both STANBY

(1)

and RUN

(2)

states. 58 62 66 µs

RUN

STATE

SUPPLIES SHUTDOWN

STANDBY

EVENT

STANDBY

STATE

STANDBY

OFF_AUDIO

OFF_VDD2

WAIT +

DD2

(1V)

DD3

(3.3V)

1.2V

1.85V

3.3V

RSTB

OFF_VDD1

OFF_VDD0

OFF_VDD3

1.85V

DD3

or OFF

)

SEQUENCE A SEQUENCE B

RUN

S TATE

SUPPLIES SHUTDOWN

STANDBY

EVENT

STANDBY

STATE

STANDBY

OFF_AUDIO

OFF_VDD3

WAIT +

DD3

(3.3V)

DD2

(1V)

3.3V

1.2V

1.85V

RSTB

OFF_VDD1

OFF_VDD0

OFF_VDD2

1.85V

DD3

or OFF

)

DD1

(1.2V)

DD0

(1.85V)

TPWM

PWM

DD1

(1.2V)

DD0

(1.85V)

TPWM

PWM

PFM

DD0

PFM

DD1

PFM

DD0

PFM

DD1

1 2 ... 29 30 31 32 33 34 35 36 37 38 39 ... 158 159

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