Rainbow-electronics ATtiny26L Bedienungsanleitung PDF herunterladen (Seite 40)

ATtiny26(L)

1477B–AVR–04/02

• Bits 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0

The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the

corresponding interrupt mask is set (one). The activity on the external INT0 pin that acti-

vates the interrupt is defined in the following table.

Note: 1. When changing the ISC10/ISC00 bits, INT0 must be disabled by clearing its Interrupt

Enable bit in the GIMSK Register. Otherwise an interrupt can occur when the bits are

changed.

Table 19. Interrupt 0 Sense Control

(1)

ISC01 ISC00 Description

0 0 The low level of INT0 generates an interrupt request.

0 1 Any change on INT0 generates an interrupt request.

1 0 The falling edge of INT0 generates an interrupt request.

1 1 The rising edge of INT0 generates an interrupt request.

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