MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
10 ______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 AINBN Channel B Analog Negative Input
2 REFA Channel A Reference Bypass. Bypass REFA with a nominal 1µF capacitor to AGND.
3 AINAN Channel A Analog Negative Input
4 AINAP Channel A Analog Positive Input
5, 26 AVDD Analog Supply. Bypass each AVDD with a nominal 1µF capacitor to AGND.
6, 24, 33 AGND Analog Ground. Connect AGND inputs together.
7, 23 DGND Digital Ground. Connect DGND inputs together.
8, 22 DVDD Digital Supply. Bypass each DVDD with a nominal 1µF capacitor to DGND.
9 DVREG Regulated Digital Core Supply. Bypass DVREG to DGND with a 10µF capacitor.
10 UP/DWN DAC Step Direction Select. Drive high to step up, drive low to step down when DACSTEP is toggled.
11 DACSTEP
DAC Step Input. Drive high to move the DAC output in the direction of UP/DWN on the next rising
edge of the system clock.
12 CONVRUN
Convert Run. Drive high to start continuous conversions on all 4 channels. The device is idle when
CONVRUN is low.
13 CS Active-Low Serial-Interface Chip Select
14 DOUT Serial-Interface Data Out. Data transitions on the rising edge of SCLK.
15 DIN Serial-Interface Data In. Data is sampled on the rising edge of SCLK.
16 SCLK Serial-Interface Clock
17, 35 I.C. Internally Connected. Connect to either AGND or DGND.
18 EOC Active-Low End-of-Conversion Indicator. EOC asserts low to indicate that new data is ready.
19 OSCIN Crystal Oscillator/External Clock Input
20 OSCOUT Crystal-Oscillator Output. Leave unconnected when using external clock.
21 SHDN Active-High Shutdown Input. Drive high to shut down the MAX11043.
25 AOUT Buffered 12-Bit Fine DAC Output
27 REFDACL Fine DAC Low Reference Bypass. Bypass REFDACL with a nominal 1µF capacitor to AGND.
28 REFDACH Fine DAC High Reference Bypass. Bypass REFDACH with a nominal 1µF capacitor to AGND.
29 REFDAC Coarse DAC Reference Bypass. Bypass REFDAC with a nominal 1µF capacitor to AGND.
30 REFD Channel D Reference Bypass. Bypass REFD with a nominal 1µF capacitor to AGND.
31 AINDN Channel D Analog Negative Input
32 AINDP Channel D Analog Positive Input
34 REFBP Main Reference Bypass. Bypass REFBP with a nominal 1µF capacitor to AGND.
36 AINCN Channel C Analog Negative Input
37 AINCP Channel C Analog Positive Input
38 REFC Channel C Reference Bypass. Bypass REFC with a nominal 1µF capacitor to AGND.
39 REFB Channel B Reference Bypass. Bypass REFB with a nominal 1µF capacitor to AGND.
40 AINBP Channel B Analog Positive Input
—EP
Exposed Pad. Connect EP to a ground plane on the PCB to enhance thermal dissipation. Internally
connected to AGND. Not intended as an electrical connection point.
(16 Seiten)
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