Rainbow-electronics MAX11043 Bedienungsanleitung PDF herunterladen (Seite 7)

MAX11043

4-Channel, 16-Bit, Simultaneous-Sampling ADCs

with PGA, Filter, and 8-/12-Bit Dual-Stage DAC

_______________________________________________________________________________________ 7

Note 1: Devices 100% production tested at T

= +125°C. Guaranteed by design and characterization to T

= -40°C.

Note 2: Full scale in analog EQ mode decreases with increasing frequency at a rate of 20dB/decade from 5kHz. If digital EQ is also

used, full scale decreases with increasing frequency at 40dB/decade from 5kHz.

Note 3: SFDR in the EQ mode is normalized to the input by subtracting the analog EQ gain at each frequency (20dB/decade) from

the FFT results.

Note 4: The absolute input voltage range is 0 to AVDD. For optimal performance, use a common-mode voltage of AVDD/2.

Note 5: Switched capacitor input impedance is proportional to 1/fC. Where f is the sampling frequency and C is the input capacitance.

ELECTRICAL CHARACTERISTICS (continued)

((V

AVDD

= +3.0V to +3.6V, V

DVDD

= +3.0V, C

DVREG

= 10µF, V

AGND

= V

DGND

= 0, common-mode input voltage = AVDD/2, V

REFBP

REFA

= V

REFB

= V

REFC

= V

REFD

= +2.5V (external reference), V

REFDAC

= V

REFDACH

= +1.25V (external reference), V

REFDACL

= 0,

REFBP

= C

REFA

= C

REFB

= C

REFC

= C

REFD

= C

REFDAC

= 1µF, f

SCLK

= 38.4MHz, f

EXCLK

= 38.4MHz (external clock applied to

OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through

a series 150Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. T

= T

MIN

to T

MAX

, unless otherwise noted (Note 1).

Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SPI INTERFACE

SCLK Clock Period t

25 ns

SCLK Pulse-Width High t

10 ns

SCLK Pulse-Width Low t

10 ns

SCLK Rise to DOUT Transition t

DOT

LOAD

= 20pF 1 15 ns

CS Fall to SCLK Rise Setup Time t

CSS

10 ns

SCLK Rise to CS Rise Setup Time t

CSH

5ns

DIN to SCLK Rise Setup Time t

10 ns

DIN to SCLK Rise Hold Time t

0ns

CS Pulse-Width High t

CSPWH

10 ns

CS Rise to DOUT Disable t

DOD

LOAD

= 20pF 20 ns

CS Fall to DOUT Enable t

DOE

LOAD

= 20pF 1 ns

EOC Fall to CS Fall t

RDS

10 ns

Typical Operating Characteristics

AVDD

= +3.3V, V

DVDD

= +3.0V, f

SCLK

= f

EXCLK

= 19.2MHz, V

REFBP

, V

REF_

= +2.5V, common-mode input voltage = AVDD/2,

= +25°C, unless otherwise noted.)

INL vs. CODE

MAX11043 toc01

CODE (LSB)

INL (LSB)

491523276816384

-4

-3

-2

-1

-5

0 65536

LP MODE

GAIN = 1

400ksps FFT

LP MODE

MAX11043 toc02

FREQUENCY (kHz)

AMPLITUDE (dBFS)

18016014012010080604020

-100

-80

-60

-40

-20

-120

0 200

= 50kHz

GAIN = 1

800ksps FFT

LP MODE

MAX11043 toc03

FREQUENCY (kHz)

AMPLITUDE (dBFS)

35030025020015010050

-120

-100

-80

-60

-40

-20

-140

0400

= 50kHz

GAIN = 1

1 2 3 4 5 6 7 8 9 10 11 12 ... 31 32

MAX11043 1

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