MAX1211
65Msps, 12-Bit, IF Sampling ADC
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ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.0V, GND = 0, REFIN = REFOUT (internal reference), C
REFOUT
= 0.1µF, C
L
≈ 5pF at digital outputs, V
IN
= -
0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f
CLK
= 65MHz (50% duty cycle), C
REFP
= C
REFN
= 0.1µF, 1µF in parallel with
10µF between REFP and REFN, C
COM
= 0.1µF in parallel with 2.2µF to GND, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
V
Tri-State Leakage Current I
LEAK
(Note 4) ±5 µA
D11–D0, DOR Tri-State Output
Capacitance
C
OUT
(Note 4) 3 pF
DAV Tri-State Output
Capacitance
C
DAV
(Note 4) 6 pF
POWER REQUIREMENTS
Analog Supply Voltage V
DD
3.0 3.3 3.6 V
Digital Output Supply Voltage OV
DD
1.7 2.0
V
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
95
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD
, differential clock
103 115
Analog Supply Current I
VDD
Power-down mode; clock idle,
PD = OV
DD
mA
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = GND, single-ended clock
314
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD
, differential clock
340 379
Analog Power Dissipation P
DISS
Power-down mode, clock idle,
PD = OV
DD
mW
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
OV
DD
= 2.0V, C
L
≈ 5pF
9.2 mA
Digital Output Supply Current I
OVDD
Power-down mode; clock idle,
PD = OV
DD
6µA
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