
MAX1329/MAX1330
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
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Table 5. ADC Power-Down Bit Configuration
APD1 APD0 ADC MODE COMMENTS
0 0 Power-down ADC/PGA off
0 1 Fast power-down ADC/PGA off between conversions
1 0 Normal ADC/PGA on
1 1 Burst
ADC/PGA on, SCLK clocks conversion, data clocked out on DOUT in real time on
the falling edge of SCLK
Table 6. ADC Reference-Buffer Bit Configuration
AREF1 AREF0
ADC REFERENCE-BUFFER GAIN (V/V)
(REFE = 0)
REFADC VOLTAGE (V)
(REFE = 1)
0 0 Buffer off High-impedance
0 1 0.5 1.25
1 0 0.8192 2.048
1 1 1 2.5
Table 4. ADC Autoconvert Bit
Configuration (AUTO<2:0>)
AUT02 AUTO1 AUTO0
ADC MASTER CLOCK
CYCLES
0 0 0 Autoconvert disabled
00 1 32
01 0 64
0 1 1 128
1 0 0 256
1 0 1 512
1 1 0 1024
1 1 1 2048
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