MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD) Supply
_______________________________________________________________________________________ 7
PLL Compensation. Connect compensation network as in Figure 4.PLLC9
Backplane Driver Negative Supply. Typically connected to PGND1. May be connected to a separate supply.BPV
SS
10
Backplane Driver OutputBPDRV11
Backplane Driver Positive Supply. Typically connected to V
OUT1
of DC-DC 1. May be connected to a
separate supply.
BPV
DD
12
Backplane Driver Clock Input. See Table 1 for input frequency ranges.BPCLK13
Analog Ground. Connect to PGND1 and PGND2. See
Supply Connections and Layout
section.GND5
Supply Input to the IC. The input voltage range is +2.8V to +5.5V.IN6
Regulator Feedback Input for Negative Output, DC-DC 2. Regulates to 0V nominal.FB2- 7
Regulator Feedback Input for Positive Output, DC-DC 2. Regulates to 1.25V nominal.FB2+8
Internal Reference Output. Connect a 0.22µF capacitor from this pin to GND. REF can source up to 50µA.REF4
Regulator Feedback Input, DC-DC 1. Regulates to 1.25V nominal.FB13
PIN
Ready Indicator Output, DC-DC 1 and DC-DC 2. Open-drain N-channel output becomes high impedance
when all three outputs are within 10% of regulation.
RDY2
Shutdown Input. Drive low to enter shutdown mode. Drive high or connect to IN for normal operation. All IC
sections are off when SHDN is low.
SHDN
1
FUNCTIONNAME
Power Ground 1. Connect to PGND2. Source of internal LX1 N-channel MOSFET.PGND118
Drain of Internal LX1 N-Channel MOSFETLX119
Sets the BPCLK input frequency range for PLL synchronization. Connect to GND, REF, or IN. See Table 1.FPLL20
DC-DC 2 Power Input. Source of Internal LX2P P-channel MOSFET.INP14
Drain of Internal LX2P P-Channel MOSFETLX2P15
Drain of Internal LX2N N-Channel MOSFETLX2N16
Power Ground 2. Connect to PGND1. Source of internal LX2N N-channel MOSFET.PGND217
______________________________________________________________Pin Description
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