MAX5122/MAX5123
+5V/+3V, 12-Bit, Serial, Force/Sense DACs
with 10ppm/°C Internal Reference
_______________________________________________________________________________________ 9
Analog Output Voltage. High impedance if part is in shutdown.OUT2
Power-Down Lockout (Digital Input).
1: Normal operation.
0: Disallows shutdown (device cannot be powered down).
PDL
4
Reset Value Input (Digital Input).
1: Connect to V
DD
to select midscale as the output reset value.
0: Connect to DGND to select 0V as the output reset value.
RSTVAL3
Active-Low Chip-Select Input (Digital Input)
CS
6
Serial Clock InputSCLK8
Serial Data Input. Data is clocked in on the rising edge of SCLK.DIN7
Reset DAC Input (Digital Input). Clears the DAC to its predetermined (RSTVAL) output state. Clearing the
DAC will cause it to exit a software shutdown state.
CLR
5
Serial Data OutputDOUT10
Power-Down Input (Digital Input). Pulling PD high when PDL = V
DD
places the IC into shutdown with a maxi-
mum shutdown current of 20µA.
PD12
User-Programmable Output (Digital Output)UPO11
Buffered Reference Output/Input. In internal reference mode, the reference buffer provides a +2.5V
(MAX5122) or +1.25V (MAX5123) nominal output, externally adjustable at REFADJ. In external reference
mode, disable the internal reference by pulling REFADJ to V
DD
and applying the external reference to REF.
REF14
PIN
Positive Power Supply. Bypass with a 0.1µF capacitor in parallel with a 4.7µF capacitor to AGND.V
DD
16
Amplifier Inverting Sense Input (Analog Input)FB1
FUNCTIONNAME
Analog Reference Adjust Input. Bypass with a 33nF capacitor to AGND. Connect to V
DD
when using an
external reference.
REFADJ15
Analog GroundAGND13
Digital GroundDGND9
Pin Description
Kommentare zu diesen Handbüchern