MAX8513/MAX8514
Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset
24 ______________________________________________________________________________________
This gain is also set by the ratio of R3/R1 where R1 is
calculated in the OUT1 Voltage Setting section. Thus:
Due to the underdamped (Q > 1) nature of the output
LC double pole, the error-amplifier zero frequencies
must be set less than the LC double-pole frequency to
provide adequate phase boost. Set the error-amplifier
first zero, f
Z1
, at 1/4th the LC double-pole frequency and
the second zero, f
Z2
, at the LC double-pole frequency.
Hence:
Set the error-amplifier f
P2
at f
ZESR
, and f
P3
to 1/2 the
switching frequency, if f
ZESR
< 1/2 f
S
. If f
ZESR
> 1/2 f
S
,
then set f
P2
at 1/2 f
S
and f
P3
at f
ZESR
.
The gain of the error amplifier between f
P2
and f
P3
is
set by the ratio of R3/R
I
and is equal to:
where R
I
is the parallel combination of R1 and R4 and
is equal to:
Therefore:
C11 can then be calculated as:
and C12 as:
Below is a numerical example to calculate the error-
amplifier compensation values used in the Typical
Applications Circuit of Figure 5:
V
IN
= 12V (nomimal input voltage)
V
RAMP
= 1V
V
OUT1
= 3.3V
V
FB1
= 1.25V
L1A = 1.8µH
C4 = 47µF/ 6.3V ceramic, with R
ESR
= 0.008Ω
f
S
= 1.4MHz
The LC double-pole frequency is calculated as:
Pick R2 = 8.06kΩ.
The modulator gain at DC is:
Pick f
C
= 100kHz.
.
.
.
.
.
.=×
.
.
.
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