Rainbow-electronics T89C5115 Bedienungsanleitung Seite 80

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T89C5115
4128A–8051–04/02
Table 54. Selected Analog Input
Voltage Conversion When the ADCIN is equals to VAREF the ADC converts the signal to 3FFh (full scale). If
the input voltage equals VAGND, the ADC converts it to 000h. Input voltage between
VAREF and VAGND are a straight-line linear conversion. All other voltages will result in
3FFh if greater than VAREF and 000h if less than VAGND.
Note that ADCIN should not exceed VAREF absolute maximum range! (see section
“AC-DC”)
Clock Selection The ADC clock is the same as CPU.
The maximum clock frequency for ADC is 700 KHz. A prescaler is featured (ADCCLK)
to generate the ADC clock from the oscillator frequency.
Figure 38. A/D Converter Clock
ADC Standby Mode When the ADC is not used, it is possible to set it in standby mode by clearing bit ADEN
in ADCON register. In this mode its power dissipation is about 1 uW.
SCH2 SCH1 SCH0 Selected Analog input
000AN0
001AN1
010AN2
011AN3
100AN4
101AN5
110AN6
111AN7
Prescaler ADCLK
A/D
Converter
ADC Clock
CPU
CLOCK
CPU Core Clock Symbol
÷ 2
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