
DS1857
Dual Temperature-Controlled Resistors with
External Temperature Input and Monitors
14 ____________________________________________________________________
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
SETTING
NAME OF LOCATION
R/W
This bit goes high after a V
CC
update has
occurred for the corresponding measurement
in bytes 62h to 63h. This bit can be written to
a 0 by the user and monitored to verify that a
conversion has occurred.
5—
R/W
This bit goes high after a MON1 update has
occurred for the corresponding measurement
in bytes 64h to 65h. This bit can be written to
a 0 by the user and monitored to verify that a
conversion has occurred.
4—
R/W
This bit goes high after a MON2 update has
occurred for the corresponding measurement
in bytes 66h to 67h. This bit can be written to
a 0 by the user and monitored to verify that a
conversion has occurred.
3——0 0 —
2——0 0 —
1——0 X —
0——0 X —
70 SRAM R — Alarm flags —
Bit 7 — — — TMPhi
This alarm flag goes high when the upper limit
of the temperature setting is violated.
6——— TMPlo
This alarm flag goes high when the lower limit
of the temperature setting is violated.
5——— V
CC
hi
This alarm flag goes high when the upper limit
of the V
CC
setting is violated.
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