
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
MAX16065/MAX16066
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Table 9. ADC Configuration Registers (continued)
Table 10. ADC Conversion Results (Read Only)
REGISTER ADDRESS
FLASH
ADDRESS
BIT RANGE DESCRIPTION
46h 246h
[0]
Differential Conversion ADC1–ADC2:
0 = Disabled
1 = Enabled
[1]
Differential Conversion ADC3–ADC4:
0 = Disabled
1 = Enabled
[2]
Differential Conversion ADC5–ADC6:
0 = Disabled
1 = Enabled
[3]
Differential Conversion ADC7–ADC8:
0 = Disabled
1 = Enabled
[4]
Differential Conversion ADC9–ADC10:
0 = Disabled
1 = Enabled
[5]
Differential Conversion ADC11–ADC12:
0 = Disabled
1 = Enabled
REGISTER ADDRESS BIT RANGE DESCRIPTION
00h [7:0] ADC1 result (MSB) bits 9–2
01h [7:6] ADC1 result (LSB) bits 1–0
02h [7:0] ADC2 result (MSB) bits 9–2
03h [7:6] ADC2 result (LSB) bits 1–0
04h [7:0] ADC3 result (MSB) bits 9–2
05h [7:6] ADC3 result (LSB) bits 1–0
06h [7:0] ADC4 result (MSB) bits 9–2
07h [7:6] ADC4 result (LSB) bits 1–0
08h [7:0] ADC5 result (MSB) bits 9–2
09h [7:6] ADC5 result (LSB) bits 1–0
0Ah [7:0] ADC6 result (MSB) bits 9–2
0Bh [7:6] ADC6 result (LSB) bits 1–0
0Ch [7:0] ADC7 result (MSB) bits 9–2
0Dh [7:6] ADC7 result (LSB) bits 1–0
0Eh [7:0] ADC8 result (MSB) bits 9–2
0Fh [7:6] ADC8 result (LSB) bits 1–0
10h [7:0] ADC9 result (MSB) bits 9–2
11h [7:6] ADC9 result (LSB) bits 1–0
12h [7:0] ADC10 result (MSB) bits 9–2
13h [7:6] ADC10 result (LSB) bits 1–0
14h [7:0] ADC11 result (MSB) bits 9–2
15h [7:6] ADC11 result (LSB) bits 1–0
16h [7:0] ADC12 result (MSB) bits 9–2
17h [7:6] ADC12 result (LSB) bits 1–0
18h [7:0] Current-sense ADC result
19h [7:0] CSP ADC output (MSB) bits 9–2
1Ah [7:6] CSP ADC output (LSB) bits 1–0
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