
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
MAX16065/MAX16066
_______________________________________________________________________________________ 9
Pin Description
PIN
NAME FUNCTION
MAX16065 MAX16066
1–6, 43–46 1–5, 36–40
MON1–
MON10
Monitor Voltage Inputs. Set monitor voltage range through configuration
registers. Measured value written to ADC register can be read back through the
SMBus or JTAG interface.
47, 48 —
MON11,
MON12
Monitor Voltage Inputs. Set monitor voltage range through configuration
registers. Measured value written to ADC register can be read back through the
SMBus or JTAG interface.
7 6 CSP
Current-Sense Amplifier Positive Input. Connect CSP to the source side of the
external sense resistor.
8 7 CSM
Current-Sense Amplifier Negative Input. Connect CSM to the load side of the
external sense resistor.
9 8 RESET Configurable Reset Output
10 9 TMS JTAG Test Mode Select
11 10 TDI JTAG Test Data Input
12 11 TCK JTAG Test Clock
13 12 TDO JTAG Test Data Output
14 13 SDA SMBus Serial-Data Open-Drain Input/Output
15 14 A0 Four-State SMBus Address. Address sampled upon POR.
16 15 SCL SMBus Serial-Clock Input
17, 42 16, 35 GND Ground
20–25 17–22
GPIO1–
GPIO6
General-Purpose Input/Outputs. GPIO_s can be configured to act as a TTL input,
a push-pull, open-drain, or high-impedance output or a pulldown circuit during a
fault event.
18, 19 —
GPIO7,
GPIO8
General-Purpose Input/Outputs. GPIO_s can be configured to act as a TTL input,
a push-pull, open-drain, or high-impedance output or a pulldown circuit during a
fault event or reverse sequencing.
26–29 —
EN_OUT12–
EN_OUT9
Outputs. Set EN_OUT_ with active-high/active-low logic and with push-pull or
open-drain configuration. EN_OUT_ can be asserted by a combination of IN_
voltages configurable through the flash.
30–37 23–30
EN_OUT1–
EN_OUT8
Outputs. Set EN_OUT_ with active-high/active-low logic and with push-pull or
open-drain configuration. EN_OUT_ can be asserted by a combination of IN_
voltages configurable through the flash. EN_OUT1–EN_OUT8 can be configured
with a charge-pump output (+10V above GND) that can drive an external
n-channel MOSFET.
38 31 EN
Analog Enable Input. All outputs deassert when V
EN
is below the enable
threshold.
39 32 DBP
Digital Bypass. All push-pull outputs are referenced to DBP. Bypass DBP with a
1FF capacitor to GND.
40 33 V
CC
Device Power Supply. Connect V
CC
to a voltage from 2.8V to 14V. Bypass V
CC
with a 10FF capacitor to GND.
41 34 ABP
Analog Bypass. Bypass ABP with a 1FF ceramic capacitor to GND.
— — EP
Exposed Pad. Internally connected to GND. Connect to ground, but do not use
as the main ground connection.
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