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3621A–MICRO–6/06
AT89LP216 [Preliminary]
13. I/O Ports
The AT89LP216 can be configured for between 9 and 12 I/O pins. The exact number of I/O pins
available depends on the clock and reset options as shown in Table 13-1. All port pins are 5V
tolerant, that is they can be pulled up or driven to 5.5V even when operating at a lower V
CC
such
as 3V.
13.1 Port Configuration
All port pins on the AT89LP216 may be configured to one of four modes: quasi-bidirectional
(standard 8051 port outputs), push-pull output, open-drain output, or input-only. Port modes may
be assigned in software on a pin-by-pin basis as shown in Table 13-2. The Tristate-Port User
Fuse determines the default state of the port pins. When the fuse is enabled, all port pins default
to input-only mode after reset. When the fuse is disabled, all port pins, with the exception of P1.0
and P1.1, default to quasi-bidirectional mode after reset and are weakly pulled high. Each port
pin also has a Schmitt-triggered input for improved input noise rejection. During Power-down all
the Schmitt-triggered inputs are disabled with the exception of P1.3, P3.2 and P3.3, which may
be used to wake up the device. Therefore, P1.3, P3.2 and P3.3 should not be left floating during
Power-down
.
Table 13-1. I/O Pin Configurations
Clock Source Reset Option Number of I/O Pins
External Crystal or Resonator
External RST
Pin 11
No external reset 12
External Clock
External RST
Pin 12
No external reset 13
Internal RC Oscillator
External RST
Pin 13
No external reset 14
Table 13-2. Configuration Modes for Port x, Bit y
PxM0.y PxM1.y Port Mode
0 0 Quasi-bidirectional
0 1 Push-pull Output
1 0 Input Only (High Impedance)
1 1 Open-Drain Output
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