
16.0 Registers (Continued)
16.5.8 Register 4Fh H_Fan Error Status
Register
Address
Read/
Write
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
Value
4Fh RWC
H_Fan
Error Status
RES
FAN4
_ERR
FAN3
_ERR
FAN2
_ERR
FAN1
_ERR
00h
Bit Name R/W Description
Sleep
Masking
0 FAN1_ERR RWC This bit is set when the Fan Tach 1 value register is above the value set in
the Fan Tach 1 Limit register.
S1*, S3*, S4/5
1 FAN2_ERR RWC This bit is set when the Fan Tach 2 value register is above the value set in
the Fan Tach 2 Limit register.
S1*, S3*, S4/5
2 FAN3_ERR RWC This bit is set when the Fan Tach 3 value register is above the value set in
the Fan Tach 3 Limit register.
S1*, S3*, S4/5
3 FAN4_ERR R This bit is set when the Fan Tach 4 value register is above the value set in
the Fan Tach 4 Limit register.
S1*, S3*, S4/5
7:4 RES R Reserved N/A
16.6 VALUE REGISTERS
16.6.1 Registers 50–53h Unfiltered Temperature Value Registers
Register
Address
Read/
Write
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
Value
50h R Zone 1 (CPU1) Temp 76543210N/D
51h R Zone 2 (CPU1) Temp 76543210N/D
52h R Zone 3 (Internal) Temp 76543210N/D
53h R/W
Zone 4
(External Digital) Temp
76543210N/D
Zones 1, 2 and 3 are all automatically updated by the LM93. The Zone 4 (External Digital) Temp register must be written by an
external SMBus device.
The temperature registers for zones 1 and 2 must return a value of 80h if the remote diode pins are not implemented by the board
designer or are not functioning properly.
16.6.2 Registers 54–55h Filtered Temperature Value Registers
Register
Address
Read/
Write
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
Value
54h R
Zone 1 (CPU1)
Filtered Temp
7654321000h
55h R
Zone 2 (CPU1)
Filtered Temp
7654321000h
These registers reflect the temperature of zones 1 and 2 after the spike smoothing filter has been applied.
The characteristics of the filtering can be adjusted by using the Zones 1/2 Spike Smoothing Control register.
LM93
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