Rainbow-electronics LM93 Bedienungsanleitung PDF herunterladen (Seite 82)

16.0 Registers (Continued)

16.9.4 Register E7h S3 GPI Mask

Address

Read/

Write

Name

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Default

Value

E7h R/W

S3 GPI

Mask

GPI7_S3

_MSK

GPI6_S3

_MSK

GPI5_S3

_MSK

GPI4_S3

_MSK

GPI3_S3

_MSK

GPI2_S3

_MSK

GPI1_S3

_MSK

GPI0_S3

_MSK

FFh

Bit Name R/W Description

0 GPI0_S3_MSK R/W If set, GPI0 errors are masked in S3 sleep state.

1 GPI1_S3_MSK R/W If set, GPI1 errors are masked in S3 sleep state.

2 GPI2_S3_MSK R/W If set, GPI2 errors are masked in S3 sleep state.

3 GPI3_S3_MSK R/W If set, GPI3 errors are masked in S3 sleep state.

4 GPI4_S3_MSK R/W If set, GPI4 errors are masked in S3 sleep state.

5 GPI5_S3_MSK R/W If set, GPI5 errors are masked in S3 sleep state.

6 GPI6_S3_MSK R/W If set, GPI6 errors are masked in S3 sleep state.

7 GPI7_S3_MSK R/W If set, GPI7 errors are masked in S3 sleep state.

16.9.5 Register E8h S3 Tach Mask

Address

Read/

Write

Name

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Default

Value

E8h R/W

S3 Tach

Mask

RES

TACH4_S3

_MSK

TACH3_S3

_MSK

TACH2_S3

_MSK

TACH1_S3

_MSK

0Fh

Bit Name R/W Description

0 TACH1_S3_MSK R/W If set, Tach1 errors are masked in S3 sleep state.

1 TACH2_S3_MSK R/W If set, Tach2 errors are masked in S3 sleep state.

2 TACH3_S3_MSK R/W If set, Tach3 errors are masked in S3 sleep state.

3 TACH4_S3_MSK R/W If set, Tach4 errors are masked in S3 sleep state.

7:4 RES R Reserved

16.9.6 Register E9h S3 Temperature/Voltage Mask

Address

Read/

Write

Name

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Default

Value

E9h R/W

S3 Voltage

Mask

RES

TEMP_

S3_MSK

AIN14_S3

_MSK

AIN13_S3

_MSK

AIN12_S3

_MSK

07h

Bit Name R/W Description

0 AIN12_S3_MSK R/W If set, AIN12 errors as masked in S3 sleep state.

1 AIN13_S3_MSK R/W If set, AIN13 errors as masked in S3 sleep state.

2 AIN14_S3_MSK R/W If set, AIN14 errors as masked in S3 sleep state.

3 TEMP_S3_MSK R/W If set, temperature errors and diode fault errors for

zones 1 and 2 are masked in S3 sleep state.

7:3 RES R Reserved

LM93

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