
16.0 Registers (Continued)
16.8.11 Register C6h PROCHOT Override
Register
Address
Read/
Write
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
Value
C6h R/W
PROCHOT
Override
FORCE
_P1
FORCE
_P2
RES PHT_DC 00h
Bit Name R/W Description
3:0 PHT_DC R/W PROCHOT duty cycle select.
5:4 RES R Reserved
6 FORCE_P1 R/W When this is set by software, P1_PROCHOT will be asserted
by the LM93 with the duty cycle selected by PHT_DC.
7 FORCE_P2 R/W When this is set by software, P2_PROCHOT will be asserted
by the LM93 with the duty cycle selected by PHT_DC.
Note that if the P1P2_PROCHOT bit is set to short the Px_PROCHOT pins together, both Px_PROCHOT outputs will be driven
together, even if only one of the FORCE_Px bits is set.
The period of the PWM signal driven on Px_PROCHOT is 3.56 ms (80 internal 22.5 kHz clocks). The asserted time can be
increased in 5 clock increments. 5 clocks is about 220 µs and would represent 6.25% percent throttled.
Possible settings for PHT_DC:
PHT_DC Asserted Period
0h 5 clocks
1h 10 clocks
2h 15 clocks
3h 20 clocks
4h 25 clocks
5h 30 clocks
6h 35 clocks
7h 40 clocks
8h 45 clocks
9h 50 clocks
Ah 55 clocks
Bh 60 clocks
Ch 65 clocks
Dh 70 clocks
Eh 75 clocks
Fh 80 clocks
LM93
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