
MAX5290–MAX5295
Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,
Voltage-Output DACs
16 ______________________________________________________________________________________
Table 1. Serial Write Data Format
MSB 16 BITS OF SERIAL DATA
C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1
Figure 1. Serial-Interface Timing Diagram (DSP Mode Disabled)
Figure 2. Serial-Interface Timing Diagram (DSP Mode Enabled)
SCLK
DIN
CS
DOUTDC1*
DOUTDC0
OR
DOUTRB*
*UPIO1/UPIO2 CONFIGURED AS DOUTDC_ (DAISY-CHAIN DATA OUTPUT, MODE 0 OR 1) OR DOUTRB (READ-BACK DATA OUTPUT).
SEE THE DATA OUTPUT SECTION FOR DETAILS.
t
CH
t
DS
t
CS0
t
DH
t
CSH
t
DO1
t
DO2
t
CL
C2C3 C1 D0
t
CSW
t
CS1
DOUT VALID
DOUT VALID
t
CSS
SCLK
DIN
CS
DOUTDC0*
DOUTDC1
OR
DOUTRB*
DSP
*UPIO1/UPIO2 CONFIGURED AS DOUTDC_ (DAISY-CHAIN DATA OUTPUT, MODE 0 OR 1) OR DOUTRB (READ-BACK DATA OUTPUT).
SEE THE DATA OUTPUT SECTION FOR DETAILS.
t
CL
t
DS
t
CSS
t
DSW
t
DSPWL
t
D02
t
D01
t
DH
t
CS0
t
CH
C3 C2 C1 D0
t
CSH
t
CSW
t
DSS
t
CS1
t
DS0
DOUT VALID
DOUT VALID
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