Rainbow-electronics DS4266 Bedienungsanleitung PDF herunterladen (Seite 5)

DS4266

DDR Clock Oscillator

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Detailed Description

The DS4266 consists of a fundamental-mode crystal

and synthesizer IC packaged in a 5mm x 3.2mm x

1.49mm, 10-pin LCCC ceramic package. The device

produces a frequency output of 266.00MHz. Two differ-

ential output types are available: LVDS and LVPECL.

The device output can be enabled or disabled through

the OE signal input. When the OE signal is low, LVPECL

outputs go to the PECL_BAS level of V

- 2.9V, while

the LVDS outputs are a logical 1. See Figures 2 and 3

for LVDS and LVPECL output timing diagrams.

Additional Information

For more available frequencies in the DS4-XO family,

refer to the DS4125 data sheet at www.maxim-

ic.com/DS4125.

THREE-

STATE

PHASE

DET

FILTER

LC-VCO

OUTSELN

OUTDRV

GND

OUTP

OUTN

DS4266

Figure 1. Functional Diagram

OUTP

P1A

PA1

0.7 x V

0.3 x V

OUTN

Figure 2. LVDS Output Timing Diagram When OE Is Enabled

and Disabled

OUTP

PECL_BIAS PECL_BIAS

OUTN

0.7 x V

0.3 x V

PAZ

PZA

Figure 3. LVPECL Output Timing Diagram When OE Is Enabled

and Disabled

1 2 3 4 5 6

DDR Clock Oscillator 1

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